Hi,
I tend to use a bunch of ferrite beads between “power sources” and “power consumers” (ICs etc…). AFAIK, to do it the Kicad way, I should add PWR_FLAG everywhere.
Instead, I preferred to remove all the PWR_FLAG and disable the corresponding ERC test.
My question : is there any hidden side-effect if I totally get rid of the PWR_FLAG in my design ?
PWR_FLAG is purely for ERC, so apart from the ERC not working there are (should be?) no side effects.
Disable ERC tests?
That only works In KiCad-nightly V5.99 as far as I know…
It would be nice if there was a possibility to treat ferrite beads, fuses and filter inductors as shorts for ERC purposes. Maybe a feature request for KiCad V7…
There is a useful feature in Altium (and probably in Cadstar, but haven’t use it since 7 years) .
There is an ERC “ignore” flag you can assign to a net.
Looks like a small red cross (shaped like Kicad’s “No Connection”) attached to a wire.
The powerful feature is : the No ERC symbol can be assigned directly from the error report page (no need to move to the specific place in the schematics page).
With a single click, you can selectively “silence” this specific error/warning, on this specific node/net, just as it shows up.
The No ERC mark can also be assign directly from a right click menu.
You can edit the No ERC properties to override 1) The global ERC settings ; 2) The interconnection errors matrix (e.g. IN connected to OUT).
OK, Altium has some advance over Kicad, but we are closing the gap ! 
(BTW, I’m very, very pleased by the evolution seen in 5.99 / 6.0)
If you are using 5.99, ERC violations can be ignored too – just right-click it in the ERC list. The ignored ERC violations are not shown as "X"s like in Altium. You can also turn off entire types of ERC checks if you never use them.
The “Signal” thing is interesting.
Does advanced ECAD have similar concepts ?
All the high-end ECAD tools have this kind of concept, as far as I know. Not so much for the ERC issue (although it does help there) as for length-matching of high-speed traces with series termination elements, I think.
Wow, I missed that !
This is that “Exclusion” thing in the ERC dialog I couldn’t figure out.
Just tested it, very nice feature.
New features coming for KiCad V6:
An explicitly written review / overview:
A long thread with info sprinkled all over and through it:
I have never used PWR_FLAG and ERC and I didn’t noticed any side-effects.
Hi,
thanks Piotr for the feeedback, and Paul for the pointers.
I was aware read the Tech Explorations article . In fact, the mention that in 5.99 you can finally “select” something in Eeschema then apply whatever command you want prompted me to test Kicad again.
I’m currently reading the long thread. 250 post left to read (over 330+)…
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