Problems with net connectivity in a board (v. pre-5)

Layout
1

I’m using the latest nightly build (14.5.) on Windows.

I have a larger board from which I made a small example showing a problem with connectivity within nets. The ratsnest shows there are no connections between some parts within some nets. But I think there should be. Here’s a screenshot and the corresponding pcb file.

connectivity_problems_pcb
connectivity_problems_pcb363×658 7.56 KB

connectivity_problems.kicad_pcb (4.1 KB)

I use 0.1mm grid here (I have tried to align the relevant items to that grid).

I have checked CH3 (net 1) coordinates and the three segments should be so that both horizontal segments are connected to the vertical. Likewise in CH2 (net 2). It looks like KiCad doesn’t understand that a segment which ends in the middle of another segment is connected. I think it should. What do you say?

Another, more weird problem is that the vias seem to be not on the grid and I can’t move them so that they would be in 0.1mm grid. Possibly for that reason the net seems to be discontinous.

I could delete the problematic parts and redo them, it seems to work, but that shouldn’t be necessary IMO.

Have I missed something, are these bugs? If they are bugs I’ll report them.

2

This is a correct statement but only for the real-time connectivity. If you run DRC, there should not be errors. Also, if you route the segments, KiCad will insert joints where the line connects, so I’d guess that you have moved an existing segment. Is that accurate?

3

I have also checked the coordinates. I have also modified the coordinates of a segment (58.3 instead of 58.30002) with no success.

I don’t know how did you trace this tracks. But if I set magnetic tracks on the general settings, the new conections are always alright no matter the grid.

4

I don’t remember how exatly I made the original file. However, I simplified the file to almost minimum and found something interesting. Now I have a board with only four tracks in the same net (two would be enough, I think).

  (segment (start 131.4 58.3) (end 129.9 58.3) (width 0.25) (layer B.Cu) (net 1))
  (segment (start 130.2 59.4) (end 130.2 58.3) (width 0.25) (layer B.Cu) (net 1))
  (segment (start 130.6 58.8) (end 130.6 58.3) (width 0.25) (layer B.Cu) (net 1))
  (segment (start 131.3 59.8) (end 131.3 58.3) (width 0.25) (layer B.Cu) (net 1))

The whole file:

connectivity_problems.kicad_pcb (2.5 KB)

There’s one horizontal track and three vertical. All vertical tracks end to the same y-coordinate and the horizontal is on that y-coordinate. So they should be connected. But as I now have the board opened, only one vertical line (the rightmost one) is connected to the horizontal one, according to both ratsnest and DRC check (unconnected count:2). If I move the connected rightmost one by selecting and pressing M, <- and -> arrows it becomes unconnected (count:3). If I move the leftmost one and the middle one properly I can get the leftmost connected, even if it’s not on the endpoint of the horizontal track. So, somehow the DRC is dependent on the coordinates or locations even they should logically be identical situations.

5

I can’t figure out how the DRC works.
I have reproduce your file.

If I trace the horizontal track and then I start the 3 vertical tracks starting from the horizontal one, the ratsnest lines disappear. And if afterwards I move any vertical track the traces keep connecting.

connectivity_problems2.kicad_pcb (2.7 KB)

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Sorry, this is the file:

connectivity_problems3.kicad_pcb (2.6 KB)

7

I remembered how I made this. KiCad doesn’t have a way to repeat an identical piece of layout (a bit like hierarchical sheet in schematic) - which is a grave deficiency when you would need it - so I copied a group of tracks and pasted them several times so that they would be attached to long common tracks. But alas, it’s of no use because they won’t connect.

About the strange behavior which I described: I guess it has something to do with the endpoints of tracks, so that if I move a track end towards the end of another track they are connected even if they don’t completely overlap. It’s of course logical. However, I don’t see a reason why tracks shouldn’t be considered connected if one end of a track hits exactly (or almost) one point in the middle line of another track. This is a problem when drawing a track and trying to connect to existing track - it won’t connect, nor does it create new segments to the existing track. I’m not sure if this is true in every situation, but this happens with the small example board.

Therefore, my original problem was that I now have non-connected tracks and I can’t even fix them without drawing new tracks/vias, which kind of defeats the purpose of copypaste.

8

The same seems to be true for vias, too. If a via covers and endpoint of a track it’s connected to that track. But I can’t just move a via onto a track even if it already belongs to the same net, it won’t connect.

If changing the DRC algorithm is unwanted a possible fix would be to break the track to segments when a same-net item (endpoint or center point) is moved onto the track’s middle line.

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I will work around the original problem (non-connected tracks and vias in copypasted parts of the board) with the Legacy mode Break track function. It’s cumbersome but works for now.

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