Hey,
I want to design a power supply board. So some contacts of connectors should have no thermal pads but solid connected ones. Small smd components can haven these thermal pads for easy soldering. So i decided to use one GND layer for all with thermal pads and create little filled zones (with higher priority) around these high current connectors.
This seems to work till i recognized in the gerber file that there is a very small space between the GND plane and the inner GND plane. They have the same net name but they are not connected.
Does anyone have experience with this issue?
Greets
Nicolai
Did you Zoom right in on the Gerber viewing, to check it was not a display rounding effect artifact ?
If this proves to be a real issue, I guess you can always route a GND trace along the ‘fault line’ to literally paper over the cracks.
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You can turn off thermals in the footprint settings for each of the high current connectors.
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Hey,
Yes it was no display issue, in some cases the drc told me that there is no connection
this worked for me, thank you!!, but I dont know whats still the problem with my first solution
Two nested layers, same network but conflicting settings. I think kicad is playing it safe here.
But then the zone/layer with the higher priority should be the one that is deciding what’s going on inside it’s perimeter…? exactly as @nicolai was expecting and trying to do.
A little test in BZR6608:
- two zones on same net on B.Cu, one with solid and the other with thermal relief connections to the pads.
Although neither of the zones has got fillet selected (corner smoothing) the corners get rounded and cause artifacts (circled in red) where one zone meets the other. Also the electrical connection isn’t there anymore for KiCAD as can be seen by the ratsnest link (circled in blue).
If I put in a track the ratsnest link vanishes, but the artifacts stay.
I checked the gerber output and at the highest zoom there is no gap, but the zoom step before that shows a gap - so it’s not safe to count on this to make it into the real thing.
@nicolai - have you checked if there is a bug report for this already?
I’m not sure how they would ‘fix’ this ‘bug’. Numerically, it is pretty much doing the right thing.
One possible solution would be to add a Zone-Zone clearance value, which is nudged negative (causes overlap) in same-net cases, and can be set positive in differing net cases.
Doing that would help simplify split-mixed power planes too.
Seems the best medium term solution would be to run a GND trace over the boundary slit, which should remove all artifacts ?
I don’t know either how they would fix it, I wouldn’t even be sure it would be labeled as bug at the moment (work amount vs. programmers) as nothing is really ‘broken’ here.
I was merely answering to @madworm 's [quote]I think kicad is playing it safe here.[/quote]
with some more information and detail in case he didn’t test it, as I don’t think this is ‘playing it safe’ but merely an unfinished feature or something along those lines and the workarounds you and madworm offered should do the trick for the time being.
What workaround?
The default for the layer is ‘use thermals’, which can be overridden in the footprint options. I think that is expected behaviour and less prone to issues than somehow figuring out how stacked and overlapping layers ought to be interpreted.
Hey thats exacly the problem, no i didn’t check if there is an bug report, that was my first kicad project and i was not sure if its maybe just my fault
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Yes, I’d agree if the design can accept using PadProperties.LocalClearance &Settings.CopperZones.PadConnection=Solid,
then that’s less editing needed.
I’ve also used traces to ‘fix up’ pour area details many times, so this is not unusual either…
no problem, I expected this kind of argument and can follow it and live with it. No worries 
