Problem with Texas LM70860 footprint

Hello everyone,

I’m having a problem using the Texas LM70860 footprint that I downloaded here:

I’m having several problems.

  • During the routing, I can’t connect to pin 1 or pin 21 (for example) it sends me back a DRC problem
  • The cooling PADs have been created with polygons, I can’t see how to assign them a “Net”

Even if I try to “trick” the routing of these components, I end up with a multitude of errors in the tests.

In your opinion, how can I create complex plane shapes with polygons in footprint and assign them to an input or at least to a Net?

Translated with DeepL.com (free version)

Do yourself a favor and draw your own symbol and (if necessary) footprint.
You will learn one of the skills necessary to use KiCad. A very fundamental skill!

There are many tutorials on YT how to make your own symbols (if you are unable to read the RTFM).

If, after that, you still have problems, feel free to come back!

Since login is required to download the footprint presumably you can’t share it. So you should either raise the issues with TI via Ultralibrarian, since they claim compatibility with KiCad, or learn to make or adapt your own footprint.

1 Like

Holy Smokes! If you are not experienced, I do not recommend working with this one. It is not a beginner sort of chip. Have a look at this footprint. It rates a “WOW.”

Do a different, easier one first!!

Funniest way of dimensioning I have ever seen!
I suspect, that the OP has no schematics.

I do not remember ever seeing a footprint which is this complicated. More pins, probably (though not a power IC; power is what I generally work with.) But not more complicated.

I am reminded of some recent experience with a voltage regulator chip from another manufacturer. It was quite a bit simpler than this one. But with experienced people working on it, we did not get the layout quite right on the first (and maybe second) try and performance issues resulted.

Why do KiCad novices like to start with SMPS so often. One of the most design sensitive circuits.

Hello everyone

Many thanks to those who took the time to reply.
Nevertheless, the answers surprise me.

What makes you think I’m a beginner?
The fact of putting in a word and sharing with you?

I have over 5 years’ experience with Kicad.
A hundred PCBs to my credit, 60/70% of them in four layers.
5 to 10 % in 8 and 16 layers.
My personal library contains several thousand components, all verified and validated.

That said, this kind of footprint is developing more and more in industrial applications, so before saying anything, it would be useful for us to share together to find solutions for integrating them into our libraries

Signed a small French engineer with only 35 years’ experience who is very happy with Kicad and sends his regards to all our friends the developers.

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Apologies, but it does happen a LOT.
In this case the symbol probably has several paralleled pins like SW1,2&3 defined as outputs and KiCad flags this.

Re bonjour,

I had to send this PCB for prototyping today
I had to find a way around the problem.

Apart from the GND zone which remained in Footprint, the two other zones, created on ultraliberian in polygon and assigned in copper zone without Net of specified.

After several attempts, I was unable to assign a Net to a filled polygon, so I assigned these zones to User Comment in the Footprint.
Then, directly on the PCB, I transformed these user comment zones into plans.

If anyone has a better solution it would be cool to share.

The final PCB

Clearly, whoever made that footprint didn’t have a clue how things work in KiCad.

To make it useable, I would do something like this:

This would obviously require changes to the schematic symbol as well.

I’ve tried this option and it works, but the symbol no longer corresponds to the component datasheet. I’ve abandoned this solution for our production and after-sales teams.

Many thanks for your contribution