Hi Sir
I have created a simple shcematic in KiCad Eschema(sorry as a new user I cannot directly insert an image to show the schematic drawing here, see my next post below)
When I export netlist(*.xml) of this schematic, it is strange that two power rails are not correctly connected in the netlist file
- Net name “USB_1P2”
at the right-top circle the net is connected to “R4095” and “EC4902”
at the middle circle the net is connected to “L4904”~“L4909”
I would expect that in netlist file the above components are all connected together through net USB_1P2, however, in netlist file they are separated as two independent nets :
<net code="8" name="Net-(EC4902-Pad1)">
<node ref="EC4902" pin="1"/>
<node ref="R4905" pin="1"/>
</net>
<net code="2" name="Net-(L4904-Pad1)">
<node ref="L4906" pin="1"/>
<node ref="L4908" pin="1"/>
<node ref="L4905" pin="1"/>
<node ref="L4907" pin="1"/>
<node ref="L4904" pin="1"/>
<node ref="L4909" pin="1"/>
</net>
- Net name “USBVCC_5PV0”
similar to the above description, in netlist file net USBVCC_5PV0 is separated as tow independent nets
_
<net code="13" name="Net-(R4907-Pad2)">
<node ref="R4907" pin="2"/>
</net>
<net code="9" name="Net-(C4927-Pad2)">
<node ref="R4908" pin="1"/>
<node ref="R4907" pin="1"/>
<node ref="C4927" pin="2"/>
<node ref="U4901" pin="E10"/>
</net>
There is another net “D3V3_USB” which is also placed on two locations in the schematic, however, in netlist file KiCad correctly connected them and also named as “D3V3_USB”
<net code="44" name="D3V3_USB">
<node ref="EC4901" pin="1"/>
<node ref="R4910" pin="1"/>
<node ref="L4903" pin="2"/>
<node ref="U4901" pin="L9"/>
<node ref="U4901" pin="B6"/>
<node ref="U4901" pin="C11"/>
<node ref="C4928" pin="2"/>
<node ref="L4910" pin="1"/>
<node ref="U4901" pin="F1"/>
<node ref="U4901" pin="E3"/>
<node ref="C4937" pin="2"/>
<node ref="U4901" pin="B1"/>
<node ref="R4908" pin="2"/>
<node ref="U4901" pin="H11"/>
<node ref="C4936" pin="2"/>
<node ref="C4932" pin="2"/>
<node ref="C4935" pin="2"/>
<node ref="C4933" pin="2"/>
<node ref="C4934" pin="2"/>
<node ref="C4929" pin="2"/>
<node ref="C4930" pin="2"/>
<node ref="C4931" pin="2"/>
</net>
After trying to find out the root cause of the problem, I found if I delete the “USB_1P2” symbol in symbol library(*.lib) and create a new one with exactly the same name and attributes, in netlist file the total 8 components connected on USB_1P2(R4905/EC4902/L4904~L4909) are correctly connected with the name “USB_1P2”, problem solved !
<net code="7" name="USB_1P2">
<node ref="L4909" pin="1"/>
<node ref="EC4902" pin="1"/>
<node ref="R4905" pin="1"/>
<node ref="L4904" pin="1"/>
<node ref="L4905" pin="1"/>
<node ref="L4908" pin="1"/>
<node ref="L4906" pin="1"/>
<node ref="L4907" pin="1"/>
</net>
Then I compare the problematic symbol library file and the new symbol library file to find out the difference as below :
(left : problematic library file / right : new library file)
for me it is beyond my knowledge to investigate the problem further, though it is critical to me to clarify the root cause before we go for manufacturing of the board, please help, thanks in advance !
