I don’t know that IC and don’t want to learn about it.
If its internal GND is connected to EP and to 1,2 pads than there is no reason to not connect them also at PCB. If currents are high I use tracks the same width as pads.
From my point of view the vias to the right of these pads are not very useful (but they don’t interfere with anything either). EP gives much better connection to GND zone (no mater if you have there many small vias or one hole as now) so if you expect big current from pads 1,2 to GND than the better way is through EP than through two vias having 18um copper at their wall.
I could use tracks little wider (or the same width) than pads but not so wider as you did.
Or buy a hot plate. Never used one, but they seem to work quite good. I will build my own.
I do have a pre-heater and a hot-air station, so the urge is not too big.
Things get cheaper and simpler, if you use a THT inductor.
Oh, just saw that you changed the inductor footprint. I personally would not add the through holes. As long as the pads do stick out underneath, all is fine. When soldering, first add some blobs (not too big, but more than just slightly tinned. Melt the solder of the first pad and slide the coil sideways onto the molten pad. Then solder the other side while pushing down the coil.
Me too, I bought a used clothes iron off ebay . . . 
That looks to me like a standard diode symbol. But it is not a schottky diode symbol, and I think the diode in question is a schottky diode.
Some vendors seem to be loose as to whether they indicate a schottky diode with a schottky diode symbol. I think it is better to use the schottky symbol if that is the intended type of diode.
It may depend upon where you look or what IC you are using. My most recent design used an LM5155, and the datasheet shows that connection. I have a net tie connecting the ground pin to the EP.
EDIT: Out of urgent last resort desperation, I am checking the AL8843EV1 user guide. It looks to me like pins 1 & 2 are directly soldered to the same ground land area as the EP.
(Used the snipping tool again.)
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I would advise you to make thermal relief on the input and output connectors, soldering the terminals of the connectors into solid polygons is not a good idea. In addition, it is difficult to visually assess the gap from the contact pads to the polygons, but I would advise you to increase the minimum to 0.4/0.5 mm.
Why not make a GND polygon in the upper-left corner of the board from the connector to the capacitors C1 C2?
Why not move the resistor R3 to the right of the trim resistor to reduce the extra track length?
I made a zone to connect pins 1 & 2 to the EP. I appreciate you taking the time to look at the eval board sheet!
Thank you for the detailed explanation!
Good suggestion! I assume that it was ok to delete the vias?
I couldn’t find an option to just have a label. The choices were dot, circle, diamond, or rectangle for the net classes. Am I missing something?
Writing from PC without KiCad…
I have never used any way to specify netclass at schematic. I didn’t know these symbols are netclass specification. For me they look like test points that I would expect to find them at PCB but I don’t see them at your PCB 
.
I use only two net classes: Default (may be Standard - don’t remember name) and HighV (in my case meaning 24V) to just specify little bigger clearance and assign nets to HighV in a table where they are defined (it was the only way existing in V5, making it at schematic is may be from V6 or V7 - didn’t used it).
In tool-box at right you have some to place label at schematic. I suppose I use global labels. In my case it is not important which label I use (all my schematics are single sheet).
Label names the net.
If you used something to set net-class than you only assigned specified wire to specified net-class and not defined net name. Net name is something different that net class.
Its a small board probably with 1oz copper, using a decent soldering iron and plenty of flux it will be OK
Personally I would advise using a solder paste stencil, solder paste and reflow . . . but that doesn’t sound like its going to happen.
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Who have it at home?
Many enthusiasts will . . . as I’m sure you know already there are many options, hot plates, cheap hot air guns, it doesn’t have to cost much. Engineers improvise
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I decided to add the third input capacitor back into the circuit. I now am using two 4.7uF 50V 1206 XR7’s and one .1uF 100V 0805 XR7 per the evaluation board. Also, @Mineotopia shared two different constant current LED driver circuits and they both had three input capacitors. Thanks you for sharing! Does the layout for all three look good? If anybody has any other ideas, please let me know! I’d like to get this board prototyped soon. Once again, thanks for all the help!! You guys have been so helpful!!!
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I see at the beginning you had vias near input capacitors GND pins. Why you deleted them? I believe you know the reason of any change (I don’t follow all posts).
For many years I was sure that critical in such DCDC are two circuits:
- C3-IC1-L1-C4-R1-C3
- D1-L1-C4-R1-D1
And I imagined them flash alternately and assumed the task of good layout is to make these flashing being invisible from as short distance from PCB as possible. The closer these circuits one to another I assume smaller differences between circuits with current so smaller changes in generated field. Smaller changes - smaller emissions. Reaching this task let to minimize the difference between these two circuits.
Recently, here at forum, I got knowledge that practically only important is the circuit being this difference between them (so it is C3-IC1-D1-C3 circuit). So what I was trying to do thinking my flashnig way was the same that true DCDC designer have in mind designing this.
Why only the difference is important - because in both these circuits L1 is in them and L protects rapid current changes. So only rapid changes (highest harmonics) are in this difference circuit.
Now in that circuit high current DC flows searching the wide copper connection and high frequency components flow searching a shortest connection.
So answer yourself why I care about these vias.
I do mostly power. I never use thermal reliefs, as it largely defeats the heat spreading effect of a copper zone. I also have no IR reflow; all of my soldering is done with one iron or the other (I have two; keep a wide screwdriver tip on one of them.)
It is true that my boards have also been plated with only 1 oz copper on the outer layers and half oz copper on the inner. That seems to be the default from most fabricators.
It is important to use flux where you want to get solder under the extended pad of a Dpak or of many ICs.
I think that my soldering has done OK…I do not believe that I have damaged any devices and they seem to be adequately soldered.
Wires or terminal blocks (like here) don’t care heat spreading…
I use 100W trafo (gun) iron for such purposes. When I wanted to solder two 4mm² wires together (in home installation) it needed little longer time but at PCB never had a problem with ‘too weak’ iron.