What does DRC say ? some of your clearances look tight, but I might be wrong . . .
I noticed a non-standard diode symbol. I once used the pspice symbol by mistake and the pinnumbering for anode kathode was inverted. In the final board design all diode markings were reversed. Thankfully it was a hand solder board.
For the schematic, you have a lot of crossing lines I would recommend:
- VIn Pin to the left side (So you have all inputs on the left and outputs on the right) Like in the datasheet: https://www.diodes.com/assets/Datasheets/AL8843.pdf
- I would also replace the symbol of the TL431
TL431
I did something similar a while ago, maybe this helps you: GitHub - DIaLOGIKa-GmbH/pcb_constant-current-driver: Testing PCBs for different constant current driver ICs
@Piotr already mentioned this but i thought I’d emphasize it a little.
the via and switch from the bottom to the top is unnecessary as the plated through hole is essentially a very large via, and can be connected to on any layer. so there’s no need to switch right before connecting to it on the bottom.
Thank you so much for all the helpful suggestions and sharing your knowledge and expertise!!!
I have made several changes today. Please have a look at the latest images and post your thoughts! I still have work to do on the EP connection of IC1 and the vias on it. I can’t find any info from the manufacturer on how to wire it. I have it stacked on the ground pin as of now. All traces are now on top of board. Ground plane covers entire bottom of board. Moved some components closer to ground per @Piotr recommendations. Did a lot of work on the schematic as well. Both schem and board pass DRC with flying colors! Still not sure if my input and output cap values are ideal? Any insight on these would be most helpful!
Actually, I just noticed from looking at the eval board schematic that the EP (pin 9) on the AL8843 is called TAB and is shown connected to ground.
To me it looks like a reasonable schottky diode symbol. (For some reason, DI and Vishay B360 datasheets do not use that symbol, but I have been using schottky diodes for > 40 years.) I don’t pay any attention to right handed or left handed on the cathode bends though. I do think that the cathode is pin 1 most often and that has bitten me in the past.
I mostly use my own custom libraries…it is easy to standardize on a diode cathode being pin 1 of a two terminal diode.
If I were drawing this schematic than:
- I would move D1 and L1 to the left (closer to IC),
- I would more R1,R2 to the right of D1,
- I would have D1 connection as straight line,
- I would not use these small circle symbols when you name nets but name them by just placing a label on them (like you see at Evaluation Board Schematic you posted).
In KiCad library there are many footprints (QFP, QFN,…) with EP with vias. Look through them to see (specially how paste layer looks). For automatic assemble holes there should be no bigger than 0.3mm to not stole paste during reflow soldering and paste opening shoulds be between holes.
For hand assemble you were already told that some people make just one enough big hole to solder from back side. I have never did it as my amateur times were when all ICs were in DIP cases and PCBs I was doing by painting tracks directly at copper and etching them myself.
How does this new footprint I made look for the AL8843? The thru hole is 2.0mm outside diameter with a 1.5mm hole. Does this seem like a good size to hand-solder from the back? Never even new this was an option until earlier in my post. Thanks for the idea!
As you hand solder the PCB, you will have hard times to solder the inductor. Looks like the pads do not extend to the outside of the case. You will need a hot air station.
I personally don’t use hand solder footprints for Rs and Cs. They are easy enough to solder.
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I like this idea.
never tried myself, but if you do not plan to automate the assembly process and you use a plated th, it seem feasible to me. Maybe the hole could be even a bit bigger, heat transfer should be ok since it will be completely filled with solder…
maybe the same approach could be done there? or a slotted th? i see no reason not to.
It obviously depends on the diameter of the bit in your soldering iron.
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I have also never did it, but it is also my opinion.
Your hole outside diameter can certainly be as your EP pad size.
If PCB thickness is 1.5mm than hole 1.5mm is deep well.
I would probably use 2.0 mm hole.
not necessarily, just use a liberal amount of flux, and let it do it’s magik!
I’ve read somewhere, that under a self used in a DC/DC converter, it’s better to not put any ground plane. this is to avoid to generate some eddie current in the plane from the changing magnetic field escaping from the inductance.
But I’m not sure if it’s a good idea or not. On one hand there is probalby some magnetic flux escaping the inductance, so it may create some current in the ground plane and waste some energy.
On the other hand the hole in the ground plane might be more detrimental.
I was talking about this particular one from one of the first posts
You can probably find arguments pro and against any solution you chose.
If you want your GND to shield in some way your PCB than any metal box shielding action is based on eddie currents, I think so nothing unusual.
When I was making PCB using LM5017 I decided to left continuous GND at bottom side (1.5mm far from inductance) and make hole in GND zone at top layer (0.1mm under inductance).
If you look at shielded inductance terminals than you notice that (at least in many of them) their terminals when pad ends don’t disappear but with only small step-up go father toward inductance center. I assumed that making a hole in top GND zone just under the switching terminal (not pad but where terminal still goes near PCB) I reduce the capacitance that have to be recharged 400 000 times per second. At bottom I left GND thinking that because of distance being 10+ times bigger the capacitance is much lower but I want to keep shielding effect.
But all of these comes only from my electronic imagination and is not based on any real measurements done.
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Once again, you guys rock!! I appreciate all the ideas! This has been one of my best learning experiences on a forum ever!!
Here are my latest footprints for IC1 and the inductor. For the inductor, I made the pads slightly wider extending out to the edge of the courtyard, and added the holes. Still have in question whether or not it is necessary or ideal to connect the EP with the actual ground terminals of the chip??
The hole sizes are 2.7mm overall diameter with a 2.0mm hole…
It’s not . . . . . . .