Please explain electrical type when create new IC pin

Dear Sir
I am newbie for embedded hardware design. When I create new project and want create new IC componet and new library. I am confused for electrical type select for PIN.
Can someone give some explain for how to use difference pin electrical types?
for example. I want to create TI TPS65217 Power Manager IC componet. I can not got right select for DGND electrical type.

By the way. Can someone give me explain for PPAD pin. I found PPAD PIN from some schematic, but the IC datasheet have not this PIN, and this PIN been connected to GND.

These are used for ERC exclusively (the tool that checks connectivity of the schematic). If you don’t want to deal with it, make everything “bidirectional”. This is a more in depth topic, but personally I don’t pay attention to the errors from connecting input to output and “pin not driven” errors on ERC, so the bidirectional setting works for me. Your mileage may vary.

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Here are the uses for the electrical pin types:

  • Input is a unidirectional input, like an input to a 7400 NAND gate.
  • Output is a unidirectional output that can drive high or low, like the output of a NAND gate.
  • Bidirectional can act as an input or an output. The I/O pins on microcontrollers are bidirectional.
  • Tri-state is an output that can drive high or low, but can also be placed in a high-impedance state where it floats. The 74125 is a chip with tri-state outputs (sometimes called three-state outputs: hi, low, and high-impedance).
  • Passive is an unpowered connection, like you would find on resistors, capacitors and inductors.
  • Unspecified is, well, unspecified. I guess you would use that when no other classification fits.
  • Power input is an pin where power comes in to a chip. Both the VCC and GND pins of chips would be classified as power inputs.
  • Power outputs are where power comes out of a chip. The outputs of voltage regulators are the most common example of this pin type.
  • Open collector output pins are outputs that can be driven low, but float otherwise. These are good for wired-AND connections where the output goes low if any of the attached open-collector pins goes low, but the output is pulled high by a pull-up resistor if all the pins are floating. The 7401 is a NAND gate chip with open-collector outputs.
  • Open emitter output pins can be driven high, but float otherwise. These are good for wired-OR connections where the output goes high if any of the attached open-emitter pins goes high, but the output is pulled low by a pull-down resistor if all the pins are floating.
  • Not-connected pins are pins which have no function. Think of these as package pins that aren’t bonded to the IC inside.

These pin types are used by eeschema ERC to detect possible errors in the circuit wiring. If you have a bunch of inputs on a net but no output pin is attached to the net, then an error is reported because there’s nothing to drive those inputs to a valid level. Or if you have two outputs attached to the same net, that’s also reported as an error because the outputs could have opposite values and the level on the net would be indeterminate (the outputs could also be damaged).

In actuality, a lot of the reported errors are not really errors at all. So eventually you’ll stop paying attention to the ERC output, just like most people ignore compiler warnings.


Thanks for your kindly help.

How could we possibly explain what “some schematic” means, if you don’t post a link to that schematic?

I’m pretty sure the PPAD pin you saw on some schematic is the same as the PowerPad pin near the bottom of the “Typical Application” schematic on p. 73 of the TI TPS65217 datasheet.
The PowerPad is also called the power pad or the thermal pad.

The PowerPad is named (but not given a number) on p. 5 of the datasheet.
The PowerPad is also mentioned in the Layout Guidelines on p. 80 of the datasheet.

The physical location of the PowerPad (here called the thermal pad or Exposed Thermal Pad) is described on page 86 and 87 of the datasheet (it’s the huge square slab of copper centered on the bottom of the chip, much larger than any of the numbered pin connections around its perimeter).

thank you for such great explanation if you dont mind please explain this passive pin its confusing me.

Have you read Rene’s FAQ?

Just to say that the engineers at IC companies who write the datasheet are perhaps not so concerned with EDA programs such as KiCad or Altium. I think that the correct way to account for the PPAD is to add one more pin (might be pin 0 or an added pin number?) to the schematic symbol. In my experience this pin is usually grounded.

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