Getting the following error in the ERC bug checker: “Pin connected to other pins, but not driven by any pin”. I am connecting the ground of this TS556 to the open collector output of the ULN2003. Instead of sinking an LED, this circuit sinks the TS556 which in turn drives an LED at a certain frequency. (This is an infrared transmitter circuit and the TS556 pulses the LED.) By turning on OBST_LED, OBST_GND is sunk and the TS556 starts driving.
If I use a PWR_FLAG will that connect GND to the rest of the circuit GND and be always on, which I do not want?
KiCad checks if power input pins are connected to a power output pin to drive it. This is an extremely powerful check that does however always seem to throw of new users.
Acknowledged, and I read that FAQ just before posting. I am using PWR_FLAG elsewhere in my design. But what I am not clear on is if adding it to OBST_GND would connect that net with the rest of the circuit’s ground and be “always on.” Is that the case?
ERC is only that good. Some special cases can simply never be translated for it. Especially not with a generic part.
If you are sure that your construction works this way then either ignore ERC in this case or create a project specific symbol that is prepared for this usecase. (Meaning change the type of the symbols output pin to either passive or even directly to power out.)
A net tie separates two nets completely. As a net tie normally is implemented with both its sides as passive there can not be the same error message in ERC when you use it correctly. (It is placed between your power net and the output pin. In the same way as you would place a series resistor with 0 ohm.)
The error message was because a GND pin is defined as a power in pin.
The PWR_FLAG acts as a power out pin, and should be directly connected to the GND pin.
Then use the OBST_GND label on the other side of the Net-Tie to prevent the error of “Conflict problem between pins”. This error is trhown because a power output may not be connected to on open collector output.
But why use a ULN2003 at all? Why not use the reset pin of the TS556?
(Saving a few uA from a battery?)
If your only goal is to get ERC to shut up. Otherwise place the PWR_Flag symbol as close as possible to the true source of this power net to ensure checking if there is a connection between the source and the user(s) of power.
If I do that, would the circuit even turn on? I thought Net-Tie is merely a graphic and cannot conduct electricity?
I think probably the correct answer is as you initially stated, to change the pin type. I did that and errors went away.
The ULN turns that entire circuit on. It is an infrared transmitter and doesn’t need to be on at all times. By sinking ground I can keep it off most of the time. If I used the reset pin it would stay on most of the time.
You seem to misunderstand what a net-tie is.
In the schematic it is a graphical symbol to tie 2 different labeledn nets together, but the PCB must always be the same as the schematic, and those nets are therefore also connected to each other.
Currently it is done in a sort of hackish way, with a footprint that has a piece of copper track. (This is on the roadmap to be improved).
I was unsure whether hierarchical and global labels with the same name were connected (This is also unclear from the EEschema manual), so I did an experiment:
Note:
Local, global & hierarchical labels on the same sheet are all connected.
Labels are case sensitive.
The net-tie connects the resistor to the other 4.
In Eeschema, the net-tie does not automatically get a footprint assigned, you have to do that yourself, just as with resistors & capacitors and such. For Pcbnew, there is currently a net-tie library with 12 different versions:
It is true that it is powerful but I think we would need some rules to follow to set power input and power output attribute to the device pins. For instance, if you have a +VDD / GND / -VSS configuration, the problem is that you can not connect together 2 power outputs, instead you can connect together how many power inputs you want. A possible solution could be set GND as power input, +VDD and -VSS as power output.
A pure net based ERC simply has its limitations. To truly check the schematic against your usecase of having multiple power supplies you would need a checker that has knowledge of the fact that every power source has two connections. Only if both sides of the power sources are connected with each other can there be a problem. (You see one would need to check two nets for problems not a single net.)
In this case kicad is correct in throwing an error. Not because there is an electrical problem but in this case because it tells the designer that ERC is not powerful enough to tell if this is an error or not. Giving control to the human. And yes a missing feature is a tool that tells kicad “this is a false positive, do not bother me about it any more”
