PCBWay - seeking help/developers for automating KiCAD data parsing/checking

[PCB_Wiz]

@anson

@Sonophoto Yes,we want to do this with software or code on our website when our customers upload file (usually is gerber). Excited to hear you can do that,please send mail to me anson at pcbway.com

I’m a little puzzled here, by exactly how you want this to operate ?

" Now we want to upgrade our service which can help us get the file parameters directly ( the size,the Min Track width,the min Spacing, Min Hole Size ,usually gerber format ) when our clients upload their files.

That is not a KiCad data parser problem, but a Gerber/Excellon problem.

It seems a simple and worthwhile report set, to add to GerbView ?

Min Track width and Min Hole size should pop out in a few lines of code, during the files-load.
Size seems to be known, as it Auto-Centres already, so just needs to report those.

That leaves Extract Min Spacing as a more difficult GerbView general problem, as well as how to manage file-type split.

The ideal Web-Vendor Automated-Website would do something like

• grab users (KiCad created, Gerber set ) Zip file, save to path/quote1746372
• run (imaginary) command gerbview.exe -dir path/quote1746372 -r Reportname.xml/xls/csv
• read generated report
• apply min.max checks and calculate quote, include report in quote to customer
• loop

GerbView does big chunks of that now, it seems to quite nicely swallow whole sets of Drill/gerber & autoscale.
I see it also correctly loads/renders KiCad slots, so can report those too.

Finer details like file sorting (eg split silk-screen-set from copper-set, cannot guarantee by name ) might be nice if get false errors from Silkscreen of tracewidth & certainly clearance pass ? )’
Maybe a silk in filename is enough ?

Looks like the only listed item of min Spacing, is special software, but that’s a tough ask from scattered Gerber data, and maybe a Clearance == MinWidth ‘rough rule’ is enough to assume from scanned data ?

[eelik]

@PCB_Wiz

It seems a simple and worthwhile report set, to add to GerbView ?

Worthwhile, sure. But simple?

All that can be checked reliably from gerbers is minimum width of copper and minimum spacing between isolated copper areas. Gerber doesn’t have knowledge of pads, tracks, zones or nets. It has graphical features which can be interpreted in different ways as far as pcb design goes. It doesn’t even have knowledge of continuing copper from one layer to another; it has to be calculated by using drilling information. Also it can’t know when manufacturer’s minimum spacing or width doesn’t matter, for example with copper text inside copper fill. So manual checking is necessary anyways.

This task needs much better and exact requirement list for functionality. Whoever implements it probably needs knowledge of gerber format. I don’t think this is a simple task unless all which is needed is checking for minimum spacing between isolated copper areas and minimum width of copper. Everything which involves pads, tracks, nets etc. is either more difficult or impossible. And I don’t have any idea about whether KiCad already have functions for calculating minimum spacing or width for gerbers, and even less idea about how they could be implemented if they don’t exist. Maybe the real KiCad developers have some idea about that.

[PCB_Wiz]

@eelik

Worthwhile, sure. But simple?

See my last paragraph qualifier.

@eelik

All that can be checked reliably from gerbers is minimum width of copper and minimum spacing between isolated copper areas.

I’m less sure about your ‘checked reliably from gerbers is minimum spacing between isolated copper areas’, claim, hence my qualifier already above.
Seems the quality resulting / code effort ratio is not worth it, hence my related question.
eg A very short trace segment is graphically legal, but could trigger a false virtex-virtex (Minimum above 0) check.

Yes Gerber limits Size, the Min Track width, Min Hole Size ( I’d add Max Hole Size too)
can be extracted in one pass, and Gerbview already has all the numbers flying past.

@eelik

And I don’t have any idea about whether KiCad already have functions for calculating minimum spacing or width for gerbers, and even less idea about how they could be implemented if they don’t exist. Maybe the real KiCad developers have some idea about that.

That type of scan-for-limits, is not complex code and is fairly common.
There is no ‘calculating’, more a simple if compare
if MinVal > ThisNewVal then
MinVal = ThisNewValM
MinVal starts at some (silly) BIG value, and hops down to the smallest new value

Routed edge slot length quoting (if done?) is not going to be easy to any-file-set-automate, but if GerbView also reported a simple table of the minW-maxW-SigmaL for each file, the user could specify a FileName containing their routing cuts, and the 3 numbers minW-maxW-SigmaL may be enough for a pricing calculator ?

[PCB_Wiz]

@anson

@ bobc @ Rene_Poschl I am sorry for my poor English to make misunderstanding. For Chinese PCB manufacturer,the engineers need to check gerber file and then arrange production.

When do you mean this check is done ?
During web quote ? or as they load PCB files for manufacture ?
What tools do you use now to create/merge the filmworks/drills, and panelize ?

[Rene_Poschl]

@PCB_Wiz

Yes Gerber limits Size, the Min Track width, Min Hole Size ( I’d add Max Hole Size too)
can be extracted in one pass, and Gerbview already has all the numbers flying past.

Is this just a sweep over tracks (reading their width setting and finding the minimum of it) or does this also take zones (polygons) into account? (For zones one would need geometric calculations to find the minimum width. This could get quite involved.) If it does not take zones into account then this result will give you a false sense of security.

[eelik]

@Rene_Poschl

For zones one would need geometric calculations to find the minimum width. This could get quite involved.

This is what I meant. If the purpose is to load and check any gerbers, not only those produced by KiCad, there’s no guarantee that a track or a zone or a pad is made with certain gerber graphical feature. If KiCad doesn’t already have geometric functions for all possible gerber shapes and/or features it will really be quite involved, to find minimum widths and spaces. Naturally I wasn’t speaking about finding minimum value amongst group of existing values.

[PCB_Wiz]

@Rene_Poschl

Is this just a sweep over tracks (reading their width setting and finding the minimum of it) or does this also take zones (polygons) into account? (For zones one would need geometric calculations to find the minimum width. This could get quite involved.) If it does not take zones into account then this result will give you a false sense of security.

Good question, there was a thread about someone worried about curved notches in touching zones.
It seems dropping the Zone MinW is a quick way to shrink that, with minimal other impact.
It seems KiCad ->GerbView manages as a distinct polygon, so a .01mm polygon might be able to avoid a false-error. This was a rare case, but it is a real reason to have a somewhat mathematical polygon width.

@eelik

This is what I meant. If the purpose is to load and check any gerbers, not only those produced by KiCad, there’s no guarantee that a track or a zone or a pad is made with certain gerber graphical feature.

Well, yes, even being able to reliably load other-flows file sets I’d taken as a can of worms, and this was taken as being a Quote KiCad Design(WEB) or Report KiCad Design(FAB) type macro-button

Maybe PcbNew can drop in as a Gerber comment, the smallest clearance, & clearance list, to pass that missing piece over. So the default gerber info is a few lines larger.

That’s a pcbnew change, but when doing that, it might also sweep for the layers Min/Maxes and report those too. Then it’s all there for a text editor or script bot to peek at.

[PCB_Wiz]

@PCB_Wiz

Maybe PcbNew can drop in as a Gerber comment , the smallest clearance, & clearance list, to pass that missing piece over. So the default gerber info is a few lines larger.

That’s a pcbnew change, but when doing that, it might also sweep for the layers Min/Maxes and report those too. Then it’s all there for a text editor or script bot to peek at.

Expanding on this (would become a feature request for pcbnew File Limits info as comments in Gerbers)

The above is natural for all coppers, … but leaves a little blindspot for Drill info.

Turns out that is almost already covered, as default Excellon is used by most PCB FABs and there is an Drill optional File Format Gerber, and that loads/renders identically in GerbView.

• but this really needs an option to generate both choices, to avoids users forgetting to update one.

Quote KiCad Design(WEB) would use Gerber drill info, and the
PCB FAB would load the Excellon, and check the Gerber, ie both are used by fab.

GerbView would logically get some spreadsheet like pane, that shows these file limits comment lines.

[Sonophoto]

Hi Anson, I emailed you. I will get my colleague into the discussion on email and we will help you figure out whether you need to use KiCAD as Wayne mentioned or some other approach.

[Sonophoto]

Thanks for a detailed and informative reply Gyros.

I always like easy APIs, they can also server as excellent material for scripting tutorials if the wrappers are coded clearly.

KiCAD appears to use swig for generating the Python interface to pcbnew (and 2.7.14 at that!) but none of the other apps appear to be scriptable. Unless I missed something… In FreeCAD the entire application can be scripted with Python and you can in fact create parts just by writing python code. I also noted early on that there is no official documentation for the scripting interface to pcbnew. (Yes, I saw the skeleton doc on readthedocs but it did not appear to have any content.) Maybe I missed something again…

SO tell me, has the CERN support turned out to not be so grand after all? I’ve never seen numbers but I was under the impression they had committed to funding some serious development work to get KiCAD up to professional muster. Lately all I have seen is fund raisers…

[Shack]

I consider the GAL Framework, push and shove router etc some major work. I believe All around scripting support hasnt been highest priority

[PCB_Wiz]

@Sonophoto

SO tell me, has the CERN support turned out to not be so grand after all? I’ve never seen numbers but I was under the impression they had committed to funding some serious development work to get KiCAD up to professional muster. Lately all I have seen is fund raisers…

My take on that, is that the CERN support was/is invaluable.
It gave credibility at a time when many forks were diluting effort, and it also popped out serious software engine room stuff like Shove Routers !

Another quite recent support milestone, (full effect nowhere near seen yet) is Digikey’s Library & donation …

[Sonophoto]

Digikey is doing a fantastic job for KiCAD. We are now using their libraries which appear to work fine with 5.000. BOM integration with the digikey process is our next holy grail.

CERN’s announcement put KiCAD on the mind of every physicist on Earth, that is a good place to be for KiCAD. Physicists like to build their own tools, that is for certain.

[Joan_Sparky]

@Sonophoto

Physicists like to build their own tools, that is for certain.

OffTopic:
Tbh, it’s a curse, as I’m quite often (esp consumer products) not satisfied what’s available - even for a lot of money and then ‘have to do it’ myself

[mtiutiu]

A nice thing that every manufacturer’s website should have is to allow customers to upload project files directly also (besides gerbers). What I mean here is that it’s easier for me to upload the Kicad pcb file only and the website should process it and generate the gerber files as needed and required by the manufacturer. This saves some hassle on my side because some manufacturers don’t support some specific features of the generated gerber files like extended attributes for example and I tend to forget this kind of nifty details when submitting…

There are already websites which support this like other users already mentioned in this thread so it would be a really nice thing to have @anson. P.S. I’m a customer who used your services some while ago - keep up the good work!

[Rene_Poschl]

@Sprig

I remain optimistic that KiCad V6 is not as far away as the two years that some forum members speculate.

I stand with my guess of two years after v 5.1 is released (So at least 3 years from now) Kicad 6 development has not yet officially started!!

If there is more money this will simply mean more of the planned features will be implemented There is already talk of putting some nice things for the symbol file format on hold for version 7 as the devs fear they can not be finished till v6 should be released.

v6 will be a lot of busy work where the users see little of it. Rewriting the file format takes a lot of effort and is simply there for preparing for future ideas. Only after the new file format works reliably will it be possible to add new features. (So my personal guess is: kicad 6 will be the file format change without adding new features to the file format. Version 7 will add all the inheritance stuff that gets us lib maintainers excited.)

One good thing that will come with v6 and the new file format is that the whole cache and rescue lib stuff can be finally retired as the symbol data will be included in the schematic file. (so like the pcb side you can then update from library on user action)

[anson]

When do you mean this check is done ?

@ PCB_Wiz Begin to review files as they upload PCB file, Our factory engineer use CAM350 to audit the file. We didn’t find the suitable gerber check can achieve this,I think engineers here can make this.

[GyrosGeier]

@PCB_Wiz

Are you saying, when you remove the last code that renders through wx , you then expect the overflow problem goes away ?

The problem is in Cairo, which doesn’t deal well with large zoom levels at all. It becomes visible when we render through wx, because the zoomable canvas class in wx configures a large zoom level (the legacy canvas uses mils as coordinates for eeschema).

So no, the bug won’t go away, but it won’t affect us anymore, and we have that part of the code under control, rather than requiring users to compile a patched Cairo library.

[davidsrsb]

Some nonsense removed
Locking this thread now