PCBNew - wants me to start over

I’ve been working on a schematic and layout for a couple weeks. I was nearing completion when the designers wanted to have 2 separate gnd planes. In the sch, I changed several GND symbols to GNDD; also deleted some components, no major rewiring.

I made a new Netlist and I believe it also reannotated.

When I bring up PCBNew, the existing layout is there, but when I read the new netlist, ALL of the components are floating and I would have to nearly start the layout from scratch. Looking at the small window in Reading Netlist, I see that all of the components were Del and then Added back in. How do I stop it from doing that?

Under what conditions does PCB decide to do this?


I think the re-annotation may have been largely responsible.

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and the problem is when it prompts for Annotation, it seems like there is no alternative to doing the annotation. “If you don’t annotate, I won’t make a netlist for you!”

What’s interesting is that the annotation didn’t change ( largely or completely tbd?), at least for the major components. I had manually set the Ref Des for some relays and connectors and those did not change. I’ve not looked at the entire schematic, but I will now.

I suppose a recovery technique is too much to expect.

So, when re-annotating, what files get changed? The Netlist has not yet been updated, so it can’t be netlist. It must just be the .sch file. I hate the thought of poking around with a text editor as that would seem to have a low probability of success.

Something tells PCBnew to Del the old and Add the new components. Anyone know the trigger?

I’m pretty sure I have sometimes had some problems when nets and symbols have been changed in schematic. There may be some bug or bugs in how they are propagated to layout. Can you isolate the changes so that you for example

  1. Change the symbols which need changing.
  2. Rewire which needs rewiring.
  3. Remove old GND connections from some symbols.
  4. Add new GNDD connections.

And after each step propagate the changes to layout.

It would be easier to see when the problem happens and how.

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There is however a solution to this. On netlist import choose the variant that uses the timestamps not the references.

In v5.1 this is the default option for the update pcb from schematic tool.
It is called “keep existing footprint to symbol association”
So if this option was used and the associations broke then the schematic was changed such that even these unique identifiers were lost.

The alternative is “reassociate footprints by reference” which depends on the refdes to still agree. (So only if this option was used should there be a problem caused by reannotating the schematic.)


I am using 5.1.2 and DID use the timestamp method.

I’ve recalled that changing to GNDD for some components also required using a Net-tie. One new component required a annotation. All previously assigned Ref Desig were retained.

The problem is in PCBNew which did not recognize all of the components had been placed except for the Net-tie.

As you seem to have followed the correct process, you should report this on Launchpad as a bug

It would be very much necessary to create a small example project where the problem can be reproduced. I’m not sure they can easily reproduce it by reading that description alone. At least give exact step by step instructions.

pcbnew can only recognise parts by the timestamp and refdes, there is no other method for it to detect “changed” modules. It does not know if modules have been “placed” or not.

It’s easy to blame pcbnew, but the problem could be in eeschema, if for example, re-annotation decides to refresh all the timestamps, and then you import by timestamp, everything will be replaced.

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