Pcbnew does not follow Eeschema (SOLVED)

[spiros]

Or at least this is what it looks like to a new user like me…

I designed my schematic with Eeschema, and it looks ok. No errors from miss ladybug. I related and created my footprints, generated the netlist and i am trying to arrange the components on Pcbnew in order to complete the PCB layout. My problem is that the tracks that appear on pcbnew representing some connections don’t seem to follow the design i made on eeschema, as can be seen here

The three pin connector at the centre and bottom of the second image of the link (Pcbnew) represents the connector that is placed at the far left side of the eeschema design (first image of link). For some reason the left and right 9V pins (n.1 & n.3) get connected to the middle pin (n.2). I cannot see how this comes up from the schematic, but i think it must come through it somehow…

I tried to ignore the traces on pcbnew and create tracks independently but some tracks did not even connect for some reason, and also i liked the correspond of pcbnew when it erases a net trace after i managed to design a successful track.

Would anyone have any suggestions about what am i missing?

thanks in advance,

Spiros

[spiros]

Thanks for the reply Andy,

I wonder though, how can you tell that 1 and 3 are connected ?
I think they shouldn’t be connected the way i designed them, should they?
Does it have to do with the 9V power tag attached to both or is it something else?

[spiros]

Yeap! That solves it! Thanks a lot Andy!
I had the green rectangle mark removed, and then i removed completely the 9V power flags. Instead i placed the plain power flags. Rat’s nest looks correct! I replaced the bridge with the correct one in Eeschema (it seems i had placed one with wrong polarities), and now everything looks good.
I got a warning in Pcbnew’s netlist saying: Warning: component ‘J2’ : board footprint ‘simple3pinconnector’ , netlist footprint ‘mykikadfootprintlib:simple3pinconnector’ which i ll consider as a minor error for now since i don’t see anything suspicious at this part’s terminology. (it’s a same 3 pin connector that i created as the input one, and it looks properly connected).
Time for some rest, and tomorrow it’s puzzle figuring out time

[spiros]

Ok, i understand some things, but to tell you the truth not quite all of them clearly. Thank you for clarifying them though.

@Andy_P

A Power Symbol defines a global net name. All nets which share the same Power Symbol anywhere in the design have the same net name.

So this means that basically everything tagged with the same power symbol, will be sharing the same net name, and so they will essentially be connected together.

On the contrary [quote=“Andy_P, post:6, topic:5931”]
A Power Flag does not define any net name. Nets which have Power Flags attached are distinct and not tied together (unless they have the same net name).
[/quote]

anything tagged with a power flag will not be connected together by default, unless some secondary/other reason occurs, as by sharing the same net name.

@Andy_P

A Power Flag’s single pin has an electrical type of Power Output. The purpose of the Power Flag is to satisfy the ERC requirement that all Power Input pins are driven by a Power Output pin.

So whenever i have a component that requires some input power, i will be putting a power flag somewhere prior it’s input requirement, so it can provide the required power.

@Andy_P

A Power Symbol’s single pin has an electrical type of Power Input. This is what allows you to place multiple Power Symbols with the same net name. If they were Power Outputs, you would get an ERC error, complaining about multiple outputs tied together.

And the reason why i would want to place a power symbol would be in case i would like to have some power supplied and at the same time having the same net name, meaning at the same time wanting the components flag to be connected together?

Furthermore, what i understand from this whole story, is that the 12V flags that i have placed on my output nets are essentially useless… Actually i just removed them and performed the ERC check, and i have no error…

[Rene_Poschl]

@spiros

So whenever i have a component that requires some input power, i will be putting a power flag somewhere prior it’s input requirement, so it can provide the required power.

You should place the power flag nearest to where the power really comes from. If your pcb is supplied with a connector than at the connector. If there is some passive component in series, after this component. (Examples could be filter components, a fuse, …)

@spiros

Furthermore, what i understand from this whole story, is that the 12V flags that i have placed on my output nets are essentially useless… Actually i just removed them and performed the ERC check, and i have no error…

They are there for human understanding. you could also just use a global label. But it is easier for a human to see that this wire in the schematic is used to supply something if a power symbol is used.