PCB Review for a mosfet gate driver board

Hello,

i would kindly ask for a PCB review of my board.
It is the final board I made on this question.

I came to the conclusion that a 5.4Ohm (Vgate/Imax) gate resistor is needed (?) and that the irl520 does not exceed the peak current of the IC (Qg / dV/dt).

Schematic

Layout

looks fine to me, but add a pd resistor to keep the input from floating around if unconnected.
I’d just rotate the mosfet in a way that is possible to connect a heatsink if the need arises.
Maybe you can connect J3.1 to 12V in order to connect 12V loads directly.

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Your answers lie right here. Some in depth study may be in order.
Ti has some of the best, if not the best, quality sources available!

No matter if your load will be powered from the same 12V power or from the other voltage with its ‘-’ connected to J1 pin 1 I don’t see the advantage of having J3 on the opposite PCB end than J1 and J2.

I like the big fat blue captions. Those immediately identify schematic sections.

Those dotted lines around the sections however are a bad idea. They mostly make the schematic more crowded. They do nothing that a bit of whitespace does not do better. They also cost an amazing amount of time during maintenance on your schematic. How many times have you changed or redrawn those rectangles?

R1 is usually not to limit the gate current from the driver IC, but to make the mosfet switch a tad slower to take the edges of the EMC, but not too slow, as this would increase power dissipation. It’s value is also non critical, so why use a resistor that is not from the E12 range?

The PCB layout looks quite good. Some small remarks:
I would rotate C1 and C2 180 degrees, this would bring all the via’s to GND closer together and reduces “loop area”.

I don’t know if the extra rows of via’s do something useful. If anything, putting some via’s closer to the IC may be (very marginally) more useful. Put them in “corners” of the top GND plane to stitch them to the bottom.

You’ve made the zones bigger then the PCB outline, which will clip the zones by the PCB outline, but you’ve put the zone boundaries on top of each other. I usually draw them in some weird parallelogram or pentagon shape, and make sure the edges of the zones themselves do not overlap. This makes an individual zone easier to select unambiguously.

One thing I’m missing is the routing of the motor power. When PWM’ming motors (or other high current loads) you need some big filter capacitors, and you also want to decrease the loop area. Twisting the wires keeps them close toether, and the twists also further reduce EMI.

I like to add some separate GND connector or test pin to each of my PCB’s. It’s specifically meant to clip the GND lead of my oscilloscope to.

The GND on this PCB is quite good, but when you divide a project over multiple PCB’s, you introduce GND and other problems. Wheere is the PWM input on J2 coming from? Running a TTL (or uC output) through long (>150mm) wiring is not ideal.

Another important thing to consider is what happens if the power GND lead gets disconnected accidentally. It’s easy to burn up the signal GND wire with a high current, and this is a fire hazard.

It’s just a personal preference, but I prefer to wire connectors similarly to the schematic. That is Power in on the “north” side, and GND on the “south” side.

If this PCB is for testing purposes, then consider adding a LED (+ resistor) to the PWM. This gives visual feedback during testing, and in production you do not have to place those parts.

Just a minor point but, how are you manufacturing this? If you are going for hand assembly you might have problems without some thermal relief between components connecting to the ground plane but if you are reflowing, then should be ok.

Not about PCB, but little things about schematic. Yes, pulling input+ low or high with a resistor is important. Pulling Input+ low is probably best. R2 is not very important. Gate of the fet is not floating, and then R2 does nothing.

What if U1 is not powered and Load is powered from different power source?

Thank you for all the responses guys.

So here is the updated layout:

  • Moved J3 as suggested.
  • Picked a 5,6Ohm resistor for R1 (but is the value ok in general?..it seems very low to me.)
  • Rotated C1 and C2
  • Removed the vias on the edge of the PCB and tried to put them near the IC
  • Repositoned the GND zones
  • Added the GND testpoint

I am always going to put this little board with an esp/arduino together in a little box, so the PWM input is close to the controller. Or should the PWM output also be close to the controlled device?

What I don’t immediately understand is:
@paulvdh
What would the value for a big filter capacitor be?
By decreasing the loop area, do you mean bring the output of the FET near to the output of the terminal and decrease trace length?
The twisted wires of a hypothetical motor are external right?
With the division of north/south, do you mean to put all the GND connections to one terminal and the power input to another, or just spread the terminals a little further apart?

I thought R2 to be the pull-down resistor of the FET, is this one useless. Should there be placed another one somewhere?

@John_Pateman
I let JLCPCB do the work.

Not a good change. You now have a mini-trace for high currents (drain).
Your first layout was better in that respect.

I would place J1,J2,J3 touching each other (provided you have precise pictures of them). Terminal blocks typically can be connected together. Thanks to that they are more stable when you tighten the screw firmly with a screwdriver compared to 2 pin terminal block standing alone.
I would place Q1 near J3 to have drain (high current) connection short and make this connection much wider (it is surprising to see gate connection fat and drain connection thin).
I would think if not to connect drain to pin 1 of J3.
I would ask myself if I really want to have two GND screws or one and without J3 at all.
But it is your project, your preferences and your decisions.

With some gate drivers, there is nothing to prevent residual gate charge from enhancing the MOSFET gate in the absence of power to the driver chip. It is important to have a way of discharging the MOSFET gate when no power is applied. That resistor could possibly reduce the tendency of the board to produce smoke…

Any piece of wire has some inductance.
When you have a piece of wire in a loop, it becomes an inductor.
The radiated energy depends on the the rate of current change, and the loop area of the the wire. The filter capacitor should be dimensioned in such a way that before that capacitor, the current is "close enough to DC to not be an important. The circuit between the filter capacitor, the mosfet switch and the load is called the “hot loop”. It has a high dI/dt and will radiate energy. It’s not about trace length on the PCB. It’s about the total length of the wiring in which you have a high rate of changes in the current ( dI/dt ) (Which is from the filter capacitor to the load) and about the enclosed area (in square mm) in that part of the circuit. Twisting this part of the wiring further reduces radiated energy and improves EMC, as you create opposing fields which cancel each other out (at some distance from the wiring).

Fet gate has large capacitance to ground. To drive that fast the driver chip needs large current, amperes, fast. I am not going to calculate anything now, but capacitance should be large enough to give that current. I=C*U/t

when no power is applied to the driver chip
Well, if it is possible to have drive chip unpowered and fet powered, I agree, pull down should be used.

There can be a big capacitor storing voltage driving the FET drain, and that can be charge coupled (or leaked) into the gate. This potential issue is not my invention…

EDIT:

The most likely problem is if the MOSFET drain voltage somehow ramps up when there is no discharge path between gate and source. There is significant (I will call it capacitance) between drain and gate so that increase in drain voltage can cause an increase in gate-source voltage, thus turning on the MOSFET. The MOSFET will then conduct current and dissipate power. Providing that discharge path is generally considered to be good design practice. Some driver ICs include it, or you may omit it in your design and be lucky.

Okay guys, thank for the answers again.

I reordered the components as I had them the first time, because I came to the conclusion that maybe designing a “general board” is not such a good a idea.

So I am going to use this one as an led strip driver.

Thank you again!

I can agree with that.

Your SMT parts are small, while most of the area is either wasted, or used for mounting holes and connectors. If you integrate the mosfet drivers on your main PCB, then the PCB size used for the driver can be reduced a lot. On your screenshot, the PCB is 650x800 pixels, while the area used for the SMT and TO220 is roughly 240x150 pixels, so around 7% of your PCB area is used for your circuit.

>>> 240*150/(650*800) = 0.06923076923076923

There are of course lots of reasons to make such a “test board”, but for production just the added time for mounting the PCB and connecting the connectors would already be prohibitive.

Okay, going to consider that.

Thank you very much.