I’m updating an old project on 7.0.1, ran DRC, and got no error reported for this:
The top silkscreen ref designator “U1” in blue is clearly over a TH pad.
(same for the value text)
Any and/or all DRC messages can be suppressed. The setting is in: PCB Editor / File / Board Setup / Design Rules / Violation Severity.
@dhaillant You are right. Looks like a bug or rather a missing feature. No violations set to ignore.
[EDIT] There is not even an entry for that in the severity matrix. The setup constraint “Minimum item clearance” seemingly only covers silk-to-silk, not silk-to-pad/via.
I did not notice that as I have a check in my custom defined rules
#make sure silkscreen text does not overlap vias or pads (rule silk2via (constraint silk_clearance(min 0.15mm)) (condition "((A.Type=='*Text') || (A.Type=='Graphic*')) && (( B.Type=='Via' ) || ( B.Type=='Pad' ))"))
The top silkscreen ref designator “U1” in blue is clearly over a TH pad. Any suggestion?
Looks like a bug, the DRC-test “Readability → Silkscreen clipped by soldermask” seems not to work.
Agreed, please raise an issue
done. sorry, forget the link:
Try todays Testing build. There is a commit to fix this
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