Very good idea. I will always consider it. Till now thinking about 4 layer PCB I assumed signal-GND-Power-signal stack up but never designed 4 layer.
Now with my first 4 layer PCB I have to use different stack up.
Previous revision of my PCB was 2 layer with shield box on top connected with many vias to bottom being 100% GND. So all signals really in shielded compartment (each line coming in/out filtered at shield border). I could do it 2 layer as I had microcontroller without thermal pad and I could go under it with VCC and spread it radiantly to other elements. Next revision will have QFN microcontroller. So I think of following stack up:
top: signal/power
inner1: ground
inner2: power
bottom: ground
Bottom has to be ground to screen everything (including power) in the compartment formed by shielding box connected with ground plane at bottom.
I hope I will be able to have all signals at top as in other case their vias will be ‘visible’ on a border of my shielding (holes in bottom layer). To not get into additional costs I assume only standard vias.
Hi the Ics (of “power” have a pad but where the positive (12v) must be connected. So I think I will fill it with via in order to connect to the power layer. I thought of using layers 1 and 4 for signal then the second power layer (12v so I can connect via the first layer) and finally the third layer a ground plane How should I “protect” the smd 0805 components that are above the connector (J1)?
When you say above, is that with respect to orientation of the image? I question because I see no space on the top layer above the connector. But generally it is good to have the ground plane as close as possible to the signal layer. And I assume that your signal layer will have these 0805 components mounted and connected with tracks. (??)
Hello sorry, I expressed myself badly. The components below J1 are all 0805 components. These components are grounded on one side and connected to the output of each IC on the other. I thought of creating a small polygon for each 0805 in order to connect to the second layer (gnd plane). That way I shouldn’t have any major problems
In theory, it seems possible that if these numerous 0805s were to share ground vias, the via impedance could cause coupling between the 0805 ground ends. But I would probably do that, if the layout permits. I would use one topside ground zone spanning across the multiple 0805s, and connecting down to the second (ground) layer with multiple vias. Or if some other tracks would break up a single top layer ground zone, you could use a few zones, each with multiple vias. What do my comrades on this forum think?
Once in my life my board was screwed up by a via which failed to connect due to poor fabrication. Ever since then, I try to use redundant vias everywhere, at least on my own boards.
I improved my pcb in this way:
- Using polygons for output this way I have more surface
- Divisions of the 4 layers in this way: 1layer signal + ground plane, 2 ground plane layer, 3 power plane layer while the 4 signal + 3.3v plane.
- To improve the thermal part of the ic I put a couple of ways through the board
- In order to distribute the current in the best possible way, I made some routes that connect to the power level.
- Also on the input of the 12v I made a layer on the F MASK level so I have the copper uncovered and it is better.
Other things to improve I do not see them. I leave you a couple of screenshots below.
Thank you all
I find the Rick Hartley videos great. He explains in a way I can understand the concepts. Your mileage may vary.
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