Hello everyone,
I am completely new to PCB design and would appreciate any feedback on my project.
The PCB is designed for four TMC2209 stepper motor drivers. The design is fairly simple, only requiring a few capacitors and screw terminals.
My main concerns are the copper trace widths and the overall layout. The worst-case scenario involves 5A at 24V (3 mm width, 0.035 mm thick) and 2A at 3.3V (0.8 mm width, 0.035 mm thick).
Any guidance provided would be invaluable.
In the start menue of KiCAD, open Calculator tools and find what you are looking for.
I’d use zones, possibly on top of wires (the wires guarantee a minimum width, zones use more copper where available). It can be as simple as one “L” for each IC, one rectangle for the connector and one long rectangle as “bar” on top.
Check the predicted temperature increase (10 degrees is a fairly common assumption for line width calculators) and note it’s on top of any other temperature increase e.g. from semiconductors.
“Fat” wires give a bit more mechanical protection against through-hole pads separating in rework. So I’d probably re-route new, wider wires on top (which may take less time than me writing this…), then “cleanup board” and remove redundant traces. Personally, I don’t want thermals on through-hole pads, just make sure the soldering iron heats the PCB in addition to the wire.
And, should there be some mounting holes? 
Possibly Fiducials also for automated assembly.
I’d double-check the data sheet whether smaller blocking capacitors are recommended, electrolyte caps don’t really help with EMI.
One more thing:
What’s the purpose of the via stitching all over the board? They do not connect anything (I assume it is a 2 layer board by the looks).
Unless you have a definite reason to use thin tracks, I like to use track width which (as wide as or nearly as wide as) the pads that you are connecting. The DCR of narrow tracks is not usually a problem at low current levels. But wider tracks are more physically robust and offer slightly less ESL and lower inductive crosstalk. The pcb fabricator does not charge less for etching more copper away from the board.
At higher voltages (over 50V??) thinner tracks may help with capacitive crosstalk. And controlled impedance might point you to a specific track width. You also may not have adequate space for wide tracks in some areas.
Those 24 volt traces going into the chips are nice and wide but the the traces going out to the motors are very thin. Maybe widen those out a bunch. Also, stepper motor drivers can easily get too hot, and I don’t see any copper for the big ground pad under those chips. Usually you would have a big pad on the top layer and put a bunch of thermal vias in it to take heat into a big ground zone on the other side of the board.
Its in a DIL. So this won’t help that much.
Blockquote
Its in a DIL. So this won’t help that much.
Oops, sorry, didn’t notice that. Are you planning a heat sink on top of the chips?
Maybe you are still right.
According to the data sheet, the chip is only available as QFN. But maybe there is some old stock available somewhere.
Furtheremoere, as always, they do have layout suggestions that are worth looking at.
And furthermore, p0llux should read the data sheet. And then continue asking in a different forum. It no longer is related to KiCAD …
It never was KiCad related . . .
(adjusting close timer)
Thanks, good points! I will definitely review and take them into consideration.
Yes, it is a 2-layer board. The via stitching is intended to connect the bottom layer ground to the top layer ground.
Maybe it’s just me, but I don’t see any top layer ground!?
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