I am working on a board and came across an issue that I do not know how to fix. I am fairly new to KiCAD (and circuit design in general), so there may be something I missed.
I have been working with a number of connectors–trying to get the layout just right. I had two PHX 20-pin headers and needed a few more pins, so I switched to 22-pin headers. After setting up the schematic, annotating the components, exporting the netlist, and importing the netlist into PCBNew, I came across this strange thing. There are some traces in the ratsnest connected that I did not connect in the schematic.
There are no junctions on these lines. I tried deleting all of the connections that were having issues in the schematic and re-drawing them. But after creating a new netlist, I still have the same issue.
I included screenshots of the schematic and pcb layout.
Can anyone help me?
Well, it looks like I can answer my own question.
I thought I would just rout everything else and deal with the strangeness tomorrow. It turns out that I had accidentally named two nets the same thing; I had two AD1_AIN2 nets and two AD1_AIN3 nets. Two of those should have been AD3_AINX.
Maybe someone else can benefit from what I have learned.
KiCAD is pretty awesome. I can see this being useful if it is not done by mistake!
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You know that you don’t need to use all those green wires if you got labels, right?
You also know that there are buses available, right?
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@Joan_Sparky,
Thanks for the tips. I am aware of those features, but have not yet used them. I guess a bus would really clean things up.
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That’s why I mention them… once you start using them the schematic becomes less crowded and easier to check for mistakes.
If you use labels, you will easily be able to check for the wrong connections… with all those wires criss-crossing it get’s really confusing - and the stables don’t have wire/net highlighting yet, so even worse.
The same with buses. Just one line going over the sheet instead of 10 ore more in parallel 
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Another thing about buses is that KiCad schematic can be set to auto-increment wire to bus entries and labels
Under Schematic Editor Options - Editing - three repeated item controls
This makes adding wide buses much less tedious and reduces typing errors
