Pad/track clearances via hierarchy global/footprint/local or just by Net?

Hello

I am using Kicad 4.0.4 to design my board, but recently I encountered a problem which causes me trouble.

As far as I understand the mask and net-to-pad clearances follow this hierarchy (“strongest” rule first):

  1. Local pad clearances
  2. Local footprint clearances
  3. Global net class clearances

At least, this works perfectly with the solder mask clearances, BUT when I try to override the global net class rules (the default one), by setting a footprint or pad rule, nothing changes. The rules in the global net class remain valid.

For example, I have a BGA part which has ground, power and signal pins. When I need to route trace near a ground pad, I see that aoutorouter forces back to maintain 0.2 pad-trace clearaance. This makes sense, since my ground signal is in the “default” global net class with the matching clearence rule and this is a clearence I wish to use for most of my design. For the FPGA tho, I wish to use different clearance rule, to able to route trace between pads. So, I change footprint rule, which is 0 by default. I set it to 0.08, but no change. The router is still acting like the pad has 0.2 pad clearance.

Has anyone encountered such Pcbnew behavior? Am I missing something?

BTW: Tried to set the rule for the part in the footprint library. I set it, but each time I close the footprint editor it is set back to 0. Is this normal?

Looking at the documentation it seems there is no hierarchy for clearance based on pads/footprints… just Nets.

I adjusted the title, maybe someone more knowledgeable chimes in.

The documentation does not specifically mention this, but the “Footprint properties” dialog shows that the global netclass clearances will be used if the clearance value for the footprint is 0. In practice, they are always used.

Maybe this functionality is just not yet implemented?

@cbernardo, @reportingsjr or @nickoe… any of you guys got an idea?
Or shall @Silico go to the bugtracker with this?

What is the behaivour in the legacy canvas?

I have not used “advanced” clearance rules recently. One could say that the behaivour you observe is expected one. The biggest clearance matters.

In legacy (Default) canvas, it works as it should. The global netclass clearences are ignored if I specify footprint/pad clearance in properties. I suppose this is specific to OpenGL canvas. I also tried to use larger clearance values than those for net-class and this works in the OpenGL canvas. The larger values are not ignored.

Thank you @nickoe for pointing this out!

For now I will use the default canvas to route traces for that BGA, but I think it would be better if this behavior would be consistent between OpenGL and default canvas, or at least, documented.

Thank you for the support! Now I can get back to my design :slight_smile:

Ok, then it is probably a bug. This should be reported on the bugtracker.

@Silico


Can you please file a bugreport for this one then?
Thx

Don’t bother, it will be fixed in the next nightly.

Tom

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I almost finnished writing the bug report. Oh well… :smiley:

Thank you! :slight_smile:

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Hey!

I tried out the latest nightly build (kicad-r7323.4d180ef-x86_64) and the bug is still there. Should I post a bug report after all?

Strange, it should be fixed. Could you post a screenshot/PCB that causes it?

Tom

Ok I just noticed something. The pad clearance in fooprint properties is set to 0,082 (all in mm) and the global net-class clearance is set to 0.2. The result is that actual clearance is 0.116. If I set footprint clearance to something like 0.15, then it works, the 0.2 global clerance is supressed and actual clearance is 0.15, but once I decrease it to something below 0.116, it just stays that way. The clearance is allways 0.116, if I go below this value.

Correction - In the picture I changed footprint clearance to 0.1, but actual clearance is still 0.116.

I appears that I have misunderstood Pcbnew behavior. The bug is fixed as you said. The problem for me now was that while the all the pads on my footprint had the clearance set to 0.082 (in footprint properties), the trace/net clearances had to be corrected as well. In the picture I posted you can see that I have traces connecting GND pads and vias. These traces have different clearance defined by net-class. If I delete those traces I can route traces between the two GND pads. So in the end I can route traces between all the pads only once I have to correct the clearance in net-class editor.

Although, I do not know why I have 0.116 clearance. It seams to be a magic number. Maybe 0.2 (net-class clearance for GND net) - 0.082 (footprint clearance) = 0.118 and I just cannot measure it precisely so I get 0.116 :confused:

In any case, one mystery is solved :slight_smile: