KiCAD Silently Resets all Net Class Memberships

[nikolx]

All the Net Class memberships that had been manually set got silently reset to the “Default” membership at some point between routing a board (including successful DRC checks) and doing the final plane fill/gerber generation. This is used for the Design Rules to set trace net class clearances, etc. My problem is my 0.024" clearance rule (and others) was ignored for the plane fill, and my ground plane is now 0.010" (plane clearance setting) from the trace. Huge problem, I may need to scrap the manufactured boards, and they are big.

This has happened on two different separate designs with two different designers using two different computers/operating systems (Ubuntu & Windows). Using KiCAD 4.0.4.

Has anyone else had this problem or seen this happen?

[Magnus_Beischer]

I have not seen this one, but I have a similar problem. I have hade clearance set to 0.007" one time (due to a rounding issue between KiCAD and Netrouting) but now I’m back at 0.008" in every setting I can find, but when pushing wires when routing the distance between pushed wires becomes 0.007"…

[Joan_Sparky]

Sounds serious.
I didn’t see a topic like that yet. Last one about clearances and netclasses was this one, started about 1-2 weeks ago:

Pad/track clearances via hierarchy global/footprint/local or just by Net?

Hello I am using Kicad 4.0.4 to design my board, but recently I encountered a problem which causes me trouble. As far as I understand the mask and net-to-pad clearances follow this hierarchy (“strongest” rule first): Local pad clearances Local footprint clearances Global net class clearances At least, this works perfectly with the solder mask clearances, BUT when I try to override the global net class rules (the default one), by setting a footprint or pad rule, nothing changes. The rules in…

Do you guys switch between OpenGL and Legacy canvases?

[nikolx]

Follow-up: The cuplrit is using the KiCAD Python interface (pcbnew).

Basically, this Python causes the problem:
import pcbnew pcb = pcbnew.LoadBoard(filename) pcbnew.SaveBoard(fpath, pcb)

We re-sequence the boards’ reference designators using Python. We can replicate the problem of all the nets being lost from the classes by having Python open a *.kicad_pcb file and re-save it. All nets are lost in the classes when re-saving it.

For example, I’ve copy-pasted a pre-resequenced to post-resequenced file:
Original file:

(net_class 30V "" (clearance 0.1778) (trace_width 0.254) (via_dia 0.9652) (via_drill 0.3556) (uvia_dia 0.3) (uvia_drill 0.1) (add_net AVIONICS_BUS_A_DUT_CONN1) (add_net AVIONICS_BUS_A_DUT_CONN2) (add_net AVIONICS_BUS_A_PSU) (add_net AVIONICS_BUS_B_DUT_CONN1) (add_net AVIONICS_BUS_B_DUT_CONN2) (add_net AVIONICS_BUS_B_PSU) (add_net VBUS_NODE1) (add_net VBUS_NODE2) (add_net VBUS_NODE3) )

After Python resequence:
(net_class 30V "" (clearance 0.1778) (trace_width 0.254) (via_dia 0.9652) (via_drill 0.3556) (uvia_dia 0.3) (uvia_drill 0.1) )

Using KiCAD 4.0.6, behaves identically on Windows and Ubuntu.

[nikolx]

KiCAD bug report filed, #1711268.

[chaujohnthan]

you have to, bcz there are a lot of legacy functions in legacy, did not get implemented in opengl mode, such as the selection.

i found out twice, when shoving around tracks, the net names of the tracks nearby got mixed up, i had to delete that connection, and reroute them.