Hi,
I have a question concerning the result of the design rule check. In the part shown in the picture
below the following error messeage appearsPad to close to pad (concerning every pad of the chip.
I don’t understand how this can happen with the shown settings of design rule check and clearance of pad. What would I have to change?
The thin red line around your pad indicates the clearance you setup in the netclass. Notice that this line collides with the nearby pads which means it is too large for the package (or footprint) you use.
So possibly decrease the clearance (file->board setup->design rules – net classes) but make sure your manufacturer can create the board with the new clearance you select.
For the unlikely case where this is not an option, double check the footprint (maybe you can tweak the pad sizes just enough to get it manufacturable while still being solder-able).
Or choose a replacement part in a larger package (larger pin pitch)
OK. But I don’t unterstand why there are other parts in the pcb where red lines also cross and it dosen’t cause truble?
OK, I now know what the difference is. When I change the clearance from 0.2 to 0.19 it works fine. So in the other case it only looks like it would cross the other pad also but it dosen’t. Thanks for helping.
Turn off the visibility of Mask layer, it’s easier to see the copper pad.
I read carefully the posts above but didn’t see the footprint properties mentioned. Each footprint has the clearance value which is inherited by all of its pads if the value of the pad is 0. If the footprint’s value is 0 it inherits the clearance from the netclass.
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