As you can see in the image, the holes on the right overlap each other’s exclusion zones.
The only way I’ve been able to fix this is to compress the pad diameter from 1.25 to 1.1 which is smaller than the specified dimensions in the datasheet.
Can i make some sort of exclusion for the overlap or am i best just to override the clearance? I’m not sure how to do either of those though
I was confused by your use of the words “Exclusion zone”. Quite a lot of people use different words for the same thing (such as “trace” and “track”), and the word “zone” is normally used in a context of an area which size is explicitly drawn by the user (Copper zones and rule area’s).
It also helps if you post the exact text of the DRC violations you get together with the screenshot. From your screenshot it looks like you have a clearance violation between two NPTH.
That does not sound like a very good idea. It probably results in that whatever should fit into those holes won’t fit into those holes anymore. The sole reason the whole DRC system was put into KiCad is to help designers make better PCB’s. It’s not implemented to trick you into designing a PCB that can not be manurefactured. (Did you spot the typo, it’s intentional 
)
When only looking at the vertical distance (real distance is a bit bigger) then I see for the hole to hole clearance for the biggest NPTH on the right side:
(0.50 + 0.65) - (0.75 + 0.85)/2 = 0.3499 mm
And for the copper to hole clearance:
(0.50 + 0.65) - (0.75 + 1.25)/2 = 0.149 mm
You can probably get rid of the DRC violations by setting both PCB Editor / File / Board Setup / Constraints / Copper to hole clearance and hole to hole clearance to smaller values, but this would also hide other “possibly troublesome” areas. These clearance values in KiCad are also just some sensible defaults. They are not related to the process of any particular PCB manufacturer, and you should verify what the tolerances are for your PCB manufacturer. It is a bit more troublesome that PTH is created at another step in the production process as NPTH, and as a result there are extra tolerances due to the alignment of the big panel in the machine.
If this is for high volume production, things like this are very important. If it’s a DIY PCB or you only make a few yourself, then it all does not matter much. You can even just cut off the plastic tabs if you have trouble fitting the pins in the NPTH.
Everything put together. I am mostly a hobbyist myself. I would probably just right click on the DRC message and then put them in the exclusion list. Do note that KiCad does keep track of the excluded DRC violations. You can always re-visit this list at some time in the future (for example when doing final checks before sending gerbers out).
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