Pad clearance issue

Hello,
I am designing a PCB with a QFN28 (CP2102N part) on it. When I run DRC, I have a weird clearance issue. As the pad 14 doesn’t have the same clearance rules than the others :

For information, this pin is unconnected in the schematic (I put a the blue cross on the pin). The pad’s isolation proprieties are the same as the others.
This give me terrible headache, I didn’t succeed to solve it by myself, I would need your help :slight_smile:

The footprint is a standard Kicad footprint : Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm

Do you have any idea to solve it ?
Thank you for your help !

Maybe the pad’s own clearance has been changed accidentally. Open the pad’s Properties and Local Clearance and Settings.

Thanks for your quick answer !
The pad’s settings are corrects :

If I put a 0.2mm clearance (like the PCB rule clearance), it works
But it would be better if Kicad picked the right settings

What’s the corresponding clearance value in the footprint’s Properties? Zero in the pad’s properties means that the value is inherited from the footprint.

What is your experience with the Net Classes in KiCad?
Do you know how the board setup works:

If the clearance of the pad is set to zero, then it inherits the clearance from the net that is attached to the pad, and the clearance of each net depends on to what Net Class it is assigned.

Pcbnew / File / Board Setup

Hello,
In the footprint’s proprieties, the pads clearance is set to 0, as well as in the pads’ local clearance
I don’t have a lot experience with Kicad, but a lot with electronic CAD softwares (I have worked years with Eagle, Proteus, Zuken…). So I understand that the clearance depends on the net connected on it, but here, I have nothing connected on the pad 14 !

I will check toning the board setup settings

Thanks for your answer

Nothing connected means it gets the default netclass. However the other nearby pins also should have the same netclass then. So something strange is going on here.


What is your KiCad version?

What does it look like if you:

  1. Click on the footprint to select it.
  2. Press: [Ctrl + e] to open the footprint in the Footprint Editor.
  3. Footprint Editor / Edit / Footprint Properties / Local Clearance and Settings
  4. Footprint Editor / Edit / Default Pad Properties / Local Clearance and Settings

Or:
If zip and upload the .kicad_pcb file, then I (or someone else interested) can have a look at it.

I have checked your different proposals. Everything seems to be right. The clearances are set to 0 everywhere

Please, find attached the PCB file.
terrariumV2_3.kicad_pcb (1.2 MB)

I download Kicad a couple of week ago :

Application: Pcbnew
Version: (5.1.6)-1, release build
Libraries:
wxWidgets 3.0.4
libcurl/7.66.0 OpenSSL/1.1.1d (Schannel) zlib/1.2.11 brotli/1.0.7 libidn2/2.2.0 libpsl/0.21.0 (+libidn2/2.1.1) nghttp2/1.39.2
Platform: Windows 8 (build 9200), 64-bit edition, 64 bit, Little endian, wxMSW
Build Info:
wxWidgets: 3.0.4 (wchar_t,wx containers,compatible with 2.8)
Boost: 1.71.0
OpenCASCADE Community Edition: 6.9.1
Curl: 7.66.0
Compiler: GCC 9.2.0 with C++ ABI 1013

Build settings:
USE_WX_GRAPHICS_CONTEXT=OFF
USE_WX_OVERLAY=OFF
KICAD_SCRIPTING=ON
KICAD_SCRIPTING_MODULES=ON
KICAD_SCRIPTING_PYTHON3=OFF
KICAD_SCRIPTING_WXPYTHON=ON
KICAD_SCRIPTING_WXPYTHON_PHOENIX=OFF
KICAD_SCRIPTING_ACTION_MENU=ON
BUILD_GITHUB_PLUGIN=ON
KICAD_USE_OCE=ON
KICAD_USE_OCC=OFF
KICAD_SPICE=ON

Net-(U5-Pad14) is member of the “230V” class which has a clearance of 0.85mm.

To fix it:
Pcbnew / File / Board Setup / Design Rules / Net Classes
Then scroll to the Net-(U5-Pad14) net and change it to the proper netclass.

2 Likes

Another small tip:
You have some DRC errors at J1, J15 and J19 because of the (unused?) middle pin. You can easily get rid of those errors by making the middle pad a bit narrower.

To do that:

  1. Hover the mouse over one of the connectors.
  2. Press [Ctrl + e] to open it in the Footprint editor.
  3. Hover over the middle pad and press e for edit.
  4. Change “Size X:” to a smaller value. ( For example 2.6mm)
  5. Exit the Footprint Editor, Save changes to PCB.
  6. Run DRC again.

The neat way to completely fix it would be to save your changed footprint into a custom project specific library, then update the schematic to use the footprint from that library and update the PCB with the new footprint.

Thanks a lot for all ! I didn’t notice this obvious mistake !
I note for the tips !

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