P Channel Mosfet symbols and footprints

Bobc, if it’s upside down do the drain and source reverse too?

If you look at the footprint you might find that information. Can you point us to the datasheet you are looking at?

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Just copy one of the fet’s in the standard library to a custom library and edit it to your liking in the symbol library editor.

Once you’ve done this a few times it’s easier and faster done then even writing a post like this on the forum.

Making custom library symbols is a very common and normal procedure.

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Drain and source function the same way regardless of orientation.

For reference, the datasheet is https://www.onsemi.com/pub/Collateral/NDP6020P-D.PDF

Kicad symbol is functionally equivalent, but mirrored around X axis:

Kicad has a footprint for TO-220, I think there are also TO-263 in latest versions of the libraries.

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The pin numbering all depends upon the devices’ physical package.

As @bobc already presented the TO-220 and TO-263 packages, let me throw this one out there as well:

In my personal symbol library I have all the possible configurations, as a reminder of just how arbitrary the pin-out can be between packages.

This does NOT mean that all of these configurations are currently manufactured; it is only a reminder to me that a manufacture could throw a wrench into the works if they wanted to.

The first letter is possible Pin 1, second letter possible Pin 2, and the third letter is possible Pin 3. A devices physical pins are typically given a standard numbering scheme for each package; I won’t otherwise mention that some manufactures consider tabs the same as pins.

No, they are just upside down.
Print out the datasheet on a piece of paper and hold it in front of a mirror to view it. The functionality remains the same, despite how it visually appears.

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The two instances in my screenshot are the same symbol. One in normal orientation and one is mirrored (pressed x while placing).

This does not change what symbol pin will be connected to which footprint pad. (gate is still pin 1, drain is still pin 2 and source is still pin 3. See: How does KiCad know which symbol pin represents which pad of the footprint?)

It only changes how the symbol is oriented in the schematic. (Same result as if you drew a new symbol that is mirrored but with the same pin assignment. KiCad includes a mirror function for symbols as this is a common use case that does not really require new symbols to be drawn -> makes the same symbol able to be used more flexible and therefore gives the circuit designer more option on how to draw the schematic.)

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In the matter of graphic symbols for MOSFETs, here is an example from IEC 60617 that appears in IEEE 315A, Clause
Please note two things about the symbol:

  1. There is no envelope symbol (the circle around the symbol) needed.
  2. The gate terminal is always drawn opposite the source terminal (not in the middle between the drain and source terminals). Yes, most MOSFET devices are symmetrical, but not all. And like for BJTs you know which terminal is which from the symbol, you do not have to label them.

I like to see the diode symbol as a reminder that the parasitic diode exists.
I prefer to see the gate offset as in the IEC. MOSFETS are normally NOT symmetrical, with the substrate drain in VMOS and source in LDMOS


So many have contributed information and suggestions, as well as some concerns about the ways to work around the issues. Since I’m not an engineer, I have elected to draw my own footprints in PCBNew and routed the copper without netlist.

It’s a simple circuit, that should be simple to implement. The manual method without schematic is probably sacrilegious to many engineers out there, but it’s done.

Thanks for all of the replies!

I just think it’s impractical. It’s easy enough to create a schematic first. (Though I’m not actually an engineer by education.)


Completely agree with eelik here.

Your circuit seems to consist of a BJT and a FET, probably some resistors and connectors.

Drawing a schematic is trivial and prevents you from a lot of silly mistakes such as wiring the transistors wrong.

Attempts of drawing a PCB without a schematic are usually only done with beginners of KiCAd, especially if they have some trouble with library symbols or foortprints.

Once you’ve learned to work with (custom) libraries for symbols & footprints and mofidying or drawing custom symbols from scratch is so trivial to do that the benefits are more important than the 5 minutes of work.


I think it is not the question of sacrilegious. I am trying to imagine more senseless use of any software and can’t find. May be using the “Put text” feature of any graphic program to write a book can compete with it.

There is that.

@zpaeric You won’t be able to realize the benefits of creating a schematic in KiCad until you create at least one complete project with one.

While not perfect, the ERC and DRC working together make it much tougher to mess up a project.

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I’m not going to quit for future projects, in fact this is my third board, and the others were smooth and easy using the schematic first.

I needed to get this done and while all of the replies were appreciated, not one answered my question to the point I could proceed on my own. I know there is a learning curve, and I will get more comfortable eventually.

Thank you all!

I’ve fast looked through the thread and I’m not sure what is your main question.
I suppose that a pin naming/numbering in symbols and footprints.
I don’t use KiCad libraries. I made my own and I write in each symbols parameters the footprint to be used (I don’t go through the step of assigning footprints to symbols during PCB design). For me the rule is: pin numbers in symbol must be the same as in footprint assigned to that symbol. If some transistor has the same footprint but with its pins differently used then I have to make for it a new symbol with differently numbered pins (in my symbols like transistor pin numbers are hidden so both will look at schematic identically). The other solution could be to make a footprint copy and change pad numbers.

Hi Zpaeric: There have been a lot of good responses to your questions and I pretty much agree with them. Pin numbers of the symbol agreeing with the physical device is most important. But there is one other matter; that of personal preference among engineers. There are some different versions of symbols. One can argue about standards; etc. but if you are doing this mostly for yourself then that becomes even less important. Like Piotr I tend to make my own symbols although it is convenient to start with the KiCad libraries. Then for transistors I delete the circle and shorten the pins. I do this to reduce clutter. Even after that there are are a few variations, such as whether the gate pin is connected to one end or to the center of the gate portion of the symbol.

Beware of one other confusion factor: I have seen different pin number - location assignments for SOT23 for example (I have not seen this problem with 3 lead TO220 which you are using). So there are a few packages for which you want to make sure that the manufacturer puts package pins 1,2,3 where you think they are…

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I am a licenced radio amateur and I’ve been an engineer for 50 years (and obviously now retired) but for simple circuits I still hand draw the PCB layout without inputting any schematic. I can draw a simple PCB quicker than I can input the schematic then get the software to create the PCB layout but, then again, most of my circuits have less than 5 ICs and 10 transistors + passives. The latest one has one 8-pin SOIC + 1 NPN + 6 R&C.
I suppose it is what you get used to, in my early days, it was two totally seperate pieces of software to design a finished object - one guy designed the circuit and another (me) had to do the PCB layout. It does tend to make me prefer just a PCB layout tool.

The problem is that you loose all support features by the software by doing it that way. Not even simple design rule checks can be done as the software can not really know if the connection is made on purpose or on accident. (Maybe older software had modes supporting this usecase better. But current PCB design software simply is not build to help here at all!)

If a board is simple enough to be done purely on the pcb side then the schematic can not take more than a few minutes to create. And these few minutes can safe you from a wrongly made pcb. -> Invest minutes in preparation, possibly gain hours or even weeks at a later point. (Weeks because you might need to trigger a new production run. Can take weeks till you have the fixed PCB in your hand.) -> To me it is clear which option i choose.

The schematic has the added benefit of being a good documentation of the system. (assuming the symbol for its components are well made and not just a row of numbered pins. Creating such a symbol only takes a few minutes so worst case double the time expected for creating the schematic. <- Still much less than a mistake can easily cost you!)

Even if there is only one IC on there i bet you that you will not know (without looking at the datasheet) which pin does what if i ask you in a year. (For most designers i would be willing to reduce the time to a few weeks. Especially if they have more than one project running at the same time.) A schematic simply makes maintenance, sharing, quality control, rework, debugging … much easier. (I would even argue that some of these tasks are to be considered impossible without schematic.)

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I understand your reasoning but these days, any PCB is likely to be a single-sided “one-off” and for my personal use (and etched by me). I suppose at my age (73) it is hard to “undo” 50 years of “do”.
I am not familiar with any schematic drawing software and therefore very slow but I think I could beat most people with a PCB layout on its own. I guess it is a case of “each to their own” and me being a dinosaur !

I still don’t see why the use case (pcb without schematic) couldn’t be supported a bit better. For example select pads -> create ad hoc net for them. That wouldn’t require much development effort but would make normal pcb editing possible for no-schematic layouts.