Hi all, I’m new to PCB design and Kicad, but am finding my way quite nicely. However, I have bumped into an issue that I do not manage to solve, hope you can help me out.
In my schematic I have a block that controls a contactor/relay. I have added a flyback diode and a label “HV_PTC+_SIG”. In that way I try to ensure the power (both + and -) for the contactor come from that diode.
However, in the end both the gate driver and the + for the contactor are powered by the same what I call 12v+_BMS-on.
Apparently this +12VBMS power flag has a higher priority than my HV_PTC+_SIG label because that is what I see in my PCB layout.
Does anyone know how to solve this?
I was thinking about disconnecting the D3 + from the gate driver and add a dedicated power input for HV_PTCplus (and attach an identical power output to the 12VBMS-on). Will that work?
Yes, there is a priority hierarchy, it was posted somewhere here I think. However, as a general rule, I would stick to one label per net. If you need to split a net and give it a different name, use a net-tie.
Also it appears you labels may not be connected properly? The small square boxes usually indicated they are unconnected. Best practice in KiCad is use a grid size of 50 mil in eeschema, and don’t change it.
It looks like you design was imported from Eagle, so that may have put things off-grid.
Eagle does not even support giving the same net different names (It does not really come with something equivalent to labels. All it has is a feature to manually change the netname and one to show the netname. The crossref feature is not really a crossreference but just a different way of showing the netname.)
This to me means that the design might have been imported from eagle but it was heavily modified in kicad.
KiCad however needs to handle this differently as it really has labels of different classes. (This is because kicad is not designed for flat design but for hierarchical design.)
You can connect global, local and hierarchical labels at any layer. These do not need to have the same name (as that would limit how one can use the hierarchical design principles. Especially multiple instantiation)
For this reason priority rules exist that uniquely determine what the resulting name will be.
Global labels (including power symbols) have the highest priority.
Hierarchical labels are next in line
Local labels have the lowest priority of user controlled net names
Automatic net names have the lowest priority over all and are overwritten by any user controlled label.
There is however one problem remaining. What happens if you have conflicting labels of the same priority. I do not think that there is a documented behavior for this. Meaning it will be determined at random (depending on parsing order or something else. The main point being that there is no way a user can reliably determine which netname will result of such a conflict.)
Thanks! That net-tie was exactly what my learning edge was. I was struggling for a minute because my tie got holes (I selected THT since that is the kind of PCB I’m working on), but after selecting CMD it worked out perfectly.
I will update my entire schematic design to ensure all nets have only one label by adding net-ties where needed.
With respect to the other useful comments:
Yes, it started off in Eagle and then heavily modified in Kicad. Tried to outsource the schematic and PCB design at first but did not end up in the desired result. That person worked in Eagle. I took over and started learning how to do it myself and am using Kicad.
Labels are connected earlier up the net. I just extended the net with a bit of dummy line to make it more clear what label belongs to what pin (net serves as kind of underline).
Actually, my guess is the anchor point for the label is on the opposite end of the label from the wire end. The reason I say this is the square is green like a wire stub, and the label connection square is black just like the label text color.
What is really odd are the little tiny signal labels for GND and what ever that text is on either side of the diode. I guess they are artifacts of the already discussed Eagle conversion?