How to ensure copper clearance around NPTH pad? Right now KICAD seem to happily spill copper over and under this hole. Pad clearances set to zero. Kicad7 here.
I like the mounting holes with pad and via best.
The copper acts as a sort of “rivet”, and the via’s keep the copper firmly attached to the PCB. KiCad will also keep a clearance from the copper.
These holes are not NPTH, but is the plating a problem? Plated holes are pretty much standard, while some PCB manufacturers apparently charge a bit extra for NPTH, because it is a separate process step.
I used NPTH as a part of my footprint, a feature to make an opening in the PCB for the reverse looking LED. Maybe not a best idea, but it worked. Probably it should be replaced with routing line on Edge.cuts layer, but anyway - if there’s a Hole intended to be made in the PCB, I’m not sure why the zone fill algorithm does not avoid it.
KiCad does keep clearances, but these are different from track to track clearances. They are in: PCB Editor / File / Board Setup / Design Rules / Constraints.
If this does not help, then post a screenshot that makes your problem more visible.
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Bingo! Thanks.
I had the Copper to hole clearance set to 0.
That’s a funny setting, as zero clearance might mean copper touches the hole but avoids hole area, which is not the case. Zero in this case means copper ignores hole. Setting this to even 0.0001 changes the behaviour dramatically, and copper zones start respecting the hole. So not sure why it’s like that, what’s most important is that it works.
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Slightly off topic, but one reason to use NPTH for mounting is the concern that a screw could scrape up the sides of a plated through hole. In theory you could end up with scraps of copper that cause shorts elsewhere. In practice, good design and careful use probably prevents any of that from happening, but I’ve been trained to use NPTH and a ring of copper (with vias as shown in your screenshot) separated slightly from the actual NPTH to ensure it isn’t accidentally replaced with a PTH.
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