I use a the LAN8720A as Ethernet PHY. The pin number 25 which is the area above the chip is supposed to be connected to the ground. But the space is too tight and I can’t draw a track to go outside the chip to connect it to the ground.
Qfn 24 chip : http://postimg.org/image/w45wsqxm9/
So what can I do??
Should I edit the footprint and make an empty space inside the pin25 then I add a via inside the empty space?? And this is a good idea because later I’ll put a solder paste under the via??
They expect you to use four vias in the ground pad to connect to a ground plane on another layer. From page 7 of the Routing Checklist
The single digital ground pin (pin 25, EDP) on the LAN8720 QFN should be connected directly into a solid, contiguous, internal ground plane. The EDP pad on the component side of the PCB should be connected to the internal digital ground plane with 4 power vias in a 2x2 grid.
Those vias should be “tented”, e.g. covered with soldermask on the other side of the board. This is so that solder does not leak out through them during reflow. In practice, I have not found untented vias to be a problem when doing hobby boards, but perhaps someone can tell us how to create tented vias in KiCad?
There are a couple of different standards for via-in-pad type applications. For this thermal slug you will probably get away with just tenting the vias as you suggest, this is the default in KiCad. To make un-tented vias you must tick the box which says “Do not tent vias” in the gerber plotting dialogue.
The more advanced technique is plugged vias where they are actually back-filled at the PCB manufacturing stage so that no solder can flow into them at all. That’s beyond the scope of what’s needed here and I’m not sure how to specify them in KiCad.
Regarding plugged vias: In my experience, plugged vias are specified in your verbal/written instructions to the PCB manufacturer, and do no require an special treatment by the CAD tool.
Vias placed in pads don’t get covered with solder mask, no matter what the tenting settings are. If the vias are large in diameter, they tend to suck solder to the other side.
They’ll still get tented on the other side of the board, so they should fill up with paste at the stencilling stage I’d have thought. If you do large vias though, the soldermask might not be thick enough to bridge the gap which would allow the solder to leak out.
Thanks for all your answers.
i think the tented via from the bottom side is the best solution. i emailed the PCB manufacture to know if they do the tented VIA.
