Quick question.
I have a symbol with some stacked pins (lets say, pair of pins)
In my schematic one of those pairs is not connected.
Then if I use the No-connection flag, I get a DRC issue, since 2 (stacked) pins have a No-Connection flag.
This kind of makes sense, but Kicad could handle this differently. I would like to use the No-connection flag in the schematic to show there is nothing (on my design) that connects to this pair of pins.
So, is this a bug, a bad decision or what?
Quick answer: why not edit the symbol and unstack the pins?
You want to have different connections (i.e. something connected and nothing connected) to two pins which are âinternallyâ connected due to the stacking. You canât have it both ways.
Yeah, I could but stacked pins mean to me they are the same thing, internally in the chip. By stacking pins you are saying that âif the visible pinâ is connected, then both pins are since they share the same functionality. But if they are not connected (non-connected) they are not connecting externally, in the schematics. If the non-connection flag is put on top of them (in the schematics), it should mean the pins are not connected to anything (in the schematics), except that they might be connected internally inside the chip which is not the scope of the Kicad symbol.
Do you know of any symbol in the default libraries where this could be an issue? Best I know is that stacked pins are only used for power and GND, and adding âNo Connectâ flags to those does not make much sense.
But in general, I do not like stacking pins at all. If I see some (any) pin on a PCB, I want to be able to find it on the schematic to see what it is and what itâs for. This is maybe not so obvious when first designing a schematic, but it is useful during servicing and fault finding later. Drawing a schematic is not only a start before designing a PCB, but itâs also a reference for later.
I have this symbol here that I believe is from the Kicad Library, but I have customized it to have these NC pins stacked.
I would like to keep it as it is close to the one that I found on the datasheet.
Now it has this footprint, that they are routing traces passing through the NC pins. I am allowing this to happen by stacking those pins.
But in one of the ics in my board, I am not using one of these channels. So, letâs say, D2+ and D2- are not connected. And placing the No-connected flag on these pins is good because it is a visual indication that I already passed through these pins.
If I remove the Non-Connected flag, the ERC does not complain since Kicad (interprets these 2 pins already connected inside) But they are not connected, actually, I just would like to show this in the schematics with the Non-Connected flag.
Here is the datasheet for reference.
http://www.ti.com/lit/ds/symlink/tpd2eusb30a.pdf
In terms of routing traces through NC pads, you might consider using the pin type âFreeâ for those pads if they are truly totally disconnected inside the physical part. You can still hide them, but that way you donât have to stack them. https://docs.kicad.org/6.0/en/eeschema/eeschema.html#pin-creation-and-editing for reference.
I can confirm this part is in the default libraries (both schematic symbol and footprint), and I also agree that making the âN.Câ pins visible does not add anything useful to the schematic. Routing through the âN.Câ pins is allowed in the datasheet, and the footprints seems to be designed to do this.
I do not really understand the descision to disallow placing a no-connect flag on stacked pins. As ERC flags it as a separate issue it clearly must have been considered at some point. My best guess is that a use case like this has not been taken into that consideration.
The simplest hack around it is to remove the NC pins from the schematic symbol completely and renumber the footprint pins. Change pad nr 6 into pad nr 5, etc.
This one is a really old addition (MR No 13) in the symbols repo.
Free type pins didnât exist at that time and so i can say that a MR to address this issue is welcomed.
Nice this is a good approach. Thanks for sharing this solution. Now, I donât think it is good enough. I would prefer to âkind of forcingâ routing through the NC pad. If they are stacked, this idea is closer and âallowing to route overâ.
I donât understand this decision too. Maybe it was not a decision and just they did not have this use case beforehand.
Are you saying that the hack is to reuse the pin numbers in their corresponding NC pads, right? This looks like a better solution than using the Free type. And then in this case I will have a custom footprint too. This is not hard for me since I keep a library with custom parts to avoid having these custom things only in the board they appear.
Edit: In this case, where the footprint is going to be customized, the user has to take care to not reuse it in other parts. I was thinking to preserve the hidden pins for reference, but not staking them, then I will use the Unconnected type to keep them hidden.
Edit2: It is not good, PCBNew complains about the missing pins, I will have to remove them from the symbol.
Yes, like so:
When the numbers are the same, KiCad always wants to connect them.
Yes, indeed. I would rename the footprint, and add the TPD4EUSB30 string to itâs name to prevent any future confusion.
Exactly, I renamed it with _Custom in the end, and it is linked with that specific symbol. And it will only work with that symbol since PCBNew are going to complain about the number of pads if it is being used with the same symbol found in Kicad Library or any other symbol that has 10 pins.
Thanks again for this suggestion. It looks like an elegant workaround for me.
There is also another small issue with this symbol here found in the library
As you can see the pins are not connected to the right wire (in the art inside)
The art is not quite accurate with the datasheet.
This is a better representation.
This is not a big deal, but it may be better to have it improved too.
The schematic symbols is just an abstract representation of a part. There is no correlation to the footprint. If any, I find the pin placement of KiCadâs schematic symbol better than the TI datasheet, but itâs just mirrored anyway and hardly worth mentioning.
@leoheck Maybe you find these issue linked to below interestingâŚ
Yeah, I agree with what is being reported there. It is what I believe too, otherwise, Kicad is being too assertive like Python with all that whitespace rules.
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