I’m using Kicad 6.0.0 rc1.
I’ve MAX17262 in my project am not able to route out signal Alter pin with minimum trace width of 4mils(since PCB Manufacturer recommended min trace width is 3mils)
lead-free 0.4mm pitch, 1.5mm x 1.5mm, 9-pin wafer-level
I’ve attached the image FYR
The faint circles around the pads are the pad clearances. They either come from the netclass or from the footprint itself. With the current setting it is simply impossible for a trace to fit there.
If you absolutely can not reduce clearances or trace width then you have to drop a via right where the pad is. Just know that you may have trouble with soldering that part that way and it may need a bit more paste for that center pin since via will wick it away.
If the manufacturer really requires such a huge clearance/trace width (If it is not a setup mistake) then it is quite unlikely they have vias this small. Meaning the most likely solution is to either ditch the bga part (replace it with an equivalent in an easier to handle package) or change to a more capable fab (more expensive)
3mils = 0,0762mm, very narrow.
from the evaluationkit, it seems they use a very tiny track for the center pad and the pad clearance is lesser than your.
Which means big bugs fab and p&p!
According to max’s 9WLP specs there are only 0.19 mm gap between landing pads (0.21mm diameter) which means a fab house capable of 3mil tracks and clearances. Doable at a cost.
I found a footprint from snapeda and copper to copper space between pads seems to be ~0.15mm (diameter 0.25mm). It would mean 0.05mm trace/space. With smaller pads (0.21 like in jos’s calculation, but I got a different number when the space is devided by 3) you would have enough space for 2/2mil.
Real via-in-pad is also an expensive option. You can’t do this with even 0.2mm via hole, 0.15 could be acceptable.
Maybe the best (cheapest) option is something like PCBWay’s “Advanced PCB” with 2/2mil trace/space - or just move to another chip package.
2/2 mil definitely will work.
3/3 could work but depends if the fab plays along.
3/3 is already in premium service, 2/2 is going to be expensive. Via in pad with filling might be a better way
2/2 or 3/3 does not make a difference for pcbway.
Not even for automotive grade boards.
May be a dollar, two or so. That’s it.
For such things, there is via-in-pad with conductive or non-conductive fill and cap technology.
What is this?
- Your center pad will have a small via in it. This might be through-board, or blind, depending on cost sensitivity.
- The plated via hole will be plugged with a resin system so it will not steal solder from the pad. For normal signal pads, non-conducting is cheaper and just fine. For lower current power pads same story.
3, After setting, the surface is ground and foil caps bonded or plated over the resin so your BGA solder works.
- You will route trace(s) out from that pad on other layer(s).
It’s interesting to follow the costs of special technologies. Maybe some day we are in a situation where a board with microvias and via in pad cost 2$. Until them it’s easily 10x as much.
If someone asks here question which leads to an answer recommending a special technology, there’s a good change that it’s cost sensitive and some other alternative should be found. Those who already know what they need rarely ask in this kind of forum.
Regarding actual cost increase, I would recommend you check with your board manufacturer about the cost of doing a localized plugged via and capping of the BGA pads for that part. My last check was it was less expensive than is being bemoaned. Other than such tricks, or significant reduction in trace/space dimensions (generally quite expensive compared to localized plug and cap), or micro-vias (depending on your manufacturer and their capabilities these may or may not add a large cost to your PCB, and back around 2000 when I was at Caterpillar we were working with one supplier that charged almost nothing for micro-vias) your choices are limited. Barring other decent solutions, your only remaining choice would be to find a different package than a 0.4mm pitch BGA. If you do so, it is having learned a lesson many of us have learned before. The only company with 0.4mm pitch BGAs that I am aware could be routed with “normal” board techniques had patterned their BGAs with with missing layers of pads to provide room for exit routing from their FPGAs. These have two outer layers of pads, missing layers of pads, then an inner layer of pads that was sell enough thought out to allow routing them without “HDI” (see Sierra Circuits for details on this type of approach). Note also that most cell phones, laptops, notepads, and even electronic watches are made using this technology these days and it is lots less expensive than in the past.
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