Not able to connect routes ! The routing start point violates DRC

I am new to Kicad (using v7) and I was having trouble connecting the routes. I am not able to connect adjacent pins to other components and I’m getting this error: ‘the routing start point violates DRC’
Can anyone please help me :

Hi, looking at the screenshot you have provided, the most likely reason is netclass constraints.

As you can see in your image there is a gray outline around your track, this indicates an area that “no other nets” can exist. Under “Board Setup” and “Constraints”

the general constraints can be set and these should align with your preferred PCB fabricator as there is a finite limit in what can be etched and drilled.

Likewise per-net classes can be set under “Net Classes” where you may have set higher clearances (eg due to voltages or CAF mitigation)

The actual used clearance can be seen in the statusbar. If you are routing a track the statusbar display the netname, the netclass and the used clearance value and the source for this clearance value.

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When I started to design the PCB, I used the calculator tool to find out what the prefer track width should be according to the possible current supply that will go through the routes. Won’t it be a problem If i reduced those values ?
Also, I tried after educing the values, I have two net classes : power and signal. I reduced them to 1.8 mm and 0.8 mm respectively, I could connect most of the adjacent pins but still there are some pins which give the same error. Also, only the SMD components are causing these errors, for THT I ended up using a 4 layer board and its working for them.

I have attached the pic here:

The ones marked with green are not getting connected and giving the same error : start point violates DRC.

Thank you, I hadn’t noticed that before

Track-width is influenced by how much current, impedance (and etching) and if you have calculated a value and are happy with that then stick with it.
The concern here is track clearance - the distance permitted between other tracks. This is governed by voltage (high voltage → larger spacing) and etching capability (higher the copper weight the larger the minimum track width)

The issue here isn’t the width (atm) but the clearance, it is huge! could you confirm the clearance that you want/need and confirm the settings in kicad

Turn this preference on and show the screen shot again . . .

Thank you, I understood the difference. I manipulated the values and was able to route all the components together. But my circuit deals with 24v, 12v, 5v and 3.3v. What would be the ideal track width? I changed the value to a minimum so that I can route, but I don’t want problems with my board. This is my very first board which will go for manufacturing. Any suggestions to that?

okay, here you go:

Thanks for that . . . what you are seeing now is the clearances required around the tracks, most tracks have a huge clearance compared to the track width, those at the bottom of U10 have much smaller clearance . . .

Check your Net classes . . . they govern track clearance

. . . as well as minimum clearance . . .