I made some changes to a schematic, and when I updated the PCB, most of the new connections have no visible ratsnest. I have ran “Clean up tracks and Vias” several times. Connections are there, because I can see where they end and begin, when I select the NET in schema. Luckily I can route those nets, because I can see where they should go, but is this a bug? What is the next step?
Edit: This is KiCad 6.08 and Win10/64. And again, some ratsnest are visible but not all.
What happens if you choose curved ratsnest, do they show up? Did you change the ratsnest colour by accident?
No. Only those two connections I could see become curved
Ratsnest color is yellow. Is it possible to have different colors for connections=ratsnests.
You say the “connections are there”. So the items are already connected? A ratsnest line will only appear if there is no connection yet. What did those schematic changes entail? Did you modify or create any nets or were you just adjusting the wires?
Also have you tried running a DRC with a parity check?
Here you can see display settings. I had two unconnected resistors. I also removed those, but it didn’t help. Connector on the right should have ratsnests coming from it.
My wrong words then. If you look at the picture in post 6, you’ll see that there are no ratsnests leaving J21 connector. J21 is connected in schematic.
It is difficult to talk about PCB and SCH without misunderstandings.
Yes, I have. There is nothing new. There are a couple of errors about overlapping courtyards. but I don’t need to fix those, because courtyard is not accurate.
Have you tried toggle ratsnest off and on?
Yes, I have. That didn’t help.
Yes, in the Appearance panel → Nets.
Ok. I understand but here I have not done anything that kind
I simplified the board quite a bit, and the problem is still there. I can send it in private mail, if you tell me what files to include.
I removed all project spesific info I could find but files are not public.
The most likely cause is that either the connections aren’t made properly in the schematics or that you forgot to update PCB from schematics.
I have updated PCB several times, and that didn’t help. The same with clean up tracks and vias. It is possible that there is something wrong somewhere, but I see no related errors anywhere. And if I select/high light the entire net in schematic, I can see end points highlighted in the PCB too, but no ratsnest. And I can route those nets normally, and get no errors.
I notice that most “invisible” ratsnest lines on connector J21 seem to belong to differential pairs. Are they assigned to netclasses different from the “default”-netclass? Are all “invisible” ratsnest-lines belong to the same netclass?
It’s possible to switch individual netclasses on/off in the appearance-panel → net pane.
It is true, that at least here the problem is in diff connections. I have not tried to change any netclasses. I’ll have to try to switch them on? I am not so expedienced in using KiCad, so we will see.
This project started from Raspberry Pi’s KiCad paggage, so I may have inherited some surprises from there.
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