I’m new to PCB Design and Layout and need some help understanding GND Planes.
Is it necessary to include them in the Design and do I even need them? Doesn’t the GND Signal come directly from the Power Supply to a Pin on a power connector and Routes to whichever Pin of the Micrcontroller or Component. Do we even need a GND Plane?
The reason why I’m asking is I’m watching this Youtube video on creating a design and layout from scratch.
I realize now since I’m not familiar with Design Guidelines, the layout rules in the video seem a little beyond my understanding. In this video, there seem to be Island/Pools where the Board’s components are not filled with the GND Plane and others which are filled.
It all seems a bit arbitrary to me, so I’m afraid I might mess something up. I am wondering if I can do away with the GND Plane and Pools/Islands completely. Or does it matter if the GND Islands are not exact? I don’t want to accidentally Ground Power or Signal Pins of the Microcontroller or components.
I’d just like to understand if this is necessary.
Yes. The single most effective thing a beginner can do to have a successful layout is use a 4 layer board and dedicate one layer to ground. That means a solid copper rectangle with absolutely no other traces, only vias connecting to your components.
Which youtube video are you specifically referencing? There are a lot of them, ranging from crappy to really good.
I’ll post some screenshots of my Layout and Schematic. All I need are some guidelines.
The component in Question that I am having trouble with is a 16Mhz Crystal Oscillator.
It is adjacent to a STM32 IC
Apparently I am not supposed to fill the surface beneath the Crystal Oscillator in the 1st F.Cu Layer which is what can be seen in the image below.
But in the 2nd Grounding plane, apparently I am supposed to create an independant Ground Pool? This is part i don’t understand. Can’t it just be empty instead? The video states to use Via’s to create its own independent Ground island which is what the yellow Square in the below Image is
I just need some Guidelines, to successfully implement the circuit in the Schematic.
Especially with low voltages and high frequencies used by modern semiconductors, proper pcb layout is fully as important as good schematic design.
For good pcb layout, proper use of ground planes is at or near the top of the list for importance. Ground planes are essential to minimize noise and stray inductance, which are two top issues affecting performance. Check out the subject of pcb image currents. The closer the ground plane is to your signal layer, the better it works.
Stray capacitance is usually not much of an issue when working with low voltages.
It is important to have some understanding of stray inductance and transmission line impedance. Understanding of how and where the currents may flow. These concepts enter heavily into good pcb layout of low voltage semiconductor circuits.
I have successfully used two layer boards for some designs, but there is no question that 4 layer boards can be made to work much better for critical designs. Many designs are critical. The typical 4-layer stack-up will have a ground plane layer as layer 2, perhaps 7 mils from the top outer (signal) layer. This close placement helps to reduce inductance in high frequency signal traces.on the top signal layer. For symmetry, layer 3 would likewise be 7 mils from layer 4. If you want to have a lot of high frequency signals on the top and bottom of the board, you might want to have a 6 layer board with ground planes at layers 2 and 5 in order to help minimize inductance at both top and bottom signal layers.
At least for power converters that I design, there might be 100 ways that someone could do the pcb layout and maybe 10 of those layouts would be good.
However before OP gets scared off note that the highest frequencies are in the vicinity of the crystal and that the rest of the high speed stuff happens internal to the chip (hence the advantage of integrated MCUs). So this doesn’t need measures beyond what’s done in your typical STM32 dev board like the blue pill.
I have been doing converter Design and in the beginning we started with a full size GND-Layer.
But we soon discovered 2 problems:
First thing is you have no control where high currents will go along. Its sometimes better to embed high-current-tracks with different GND-Net-Names into planes or on other layers.
Second thing is that the GND layer may distribute disturbances all over your circuit.
We often removed parts (!) of the GND-Layer to achieve EMC.
So what I am trying to say is: Yes, a GND-Layer is a good thing to have and very useful during layouting - but always keep in mind what currents you want to have IN that layer !
As a newbie you might be interested in Tutorial: Introduction to PCB design with KiCad version 5.1 (Getting Started) Basic handling of zones is included in the tutorial. More details about zones is found in How to create a power plane (using zones)
In past it was possible and used to not use GND plane but nowadays it is hard to find circuits where GND plane would be not important.
The faster ICs you use the more GND plane use is important.
Simplifying lots of things you can look at it this way:
Currents always flow in closed circuits. If you connect IC output with any load the current flowing from output to load looks for its way back to source through GND. The high frequency parts of your signal (any digital signal has high frequency parts) travelling back in GND plane likes to get back to the signal source not the shortest way in GND but the way just under the signal. Imagine how small is the field of the current circle in that case. The field decide how much of the signal is emitted as disturbance. And imagine that field if there is no GND plane and current goes back through the tracks you left for it.
Circuit sensitivity for disturbances also depend of the field surrounded by circuit.
I am designing all my PCB as 2 layer with ALL bottom as GND. I place elements such way to have no to cross tracks. I change microcontroller pin assigned to any task many times to untangle signals. If crossing is really needed I prefer to use 0R then to go with track to bottom layer.
If you have digital and analog circuits at the same PCB things complicates. There are two schools. To use one single GND for all PCB and separate analog from digital parts with some distance (I have read that about 2cm separation is enough), or to break your GND that way to don’t allow to mix analog and digital signals. In second case you have to avoid crossing the gaps in GND plane with any signal line. You can cross if you really know what you are doing (for example under that crossing you place capacitor connecting GND to GND to give the path for high f components of return current).
Regarding your later pictures. I didn’t make any special combinations around crystals. In my PCB there are continuous GND under them. The currents between crystal and microcontroller are rather small in my opinion (crystal need little power to keep it working and drives high impedance IC input). The most currents flow between crystal and capacitors so I take care to have capacitors connected directly to crystal GND pins (and capacitor to capacitor) to have these currents not need to go through GND plane.
I think in current ICs the crystal generators are done that way that they have no rectangular signal at its outputs what would generate high currents to one of capacitors.
Thank you for your answer. Good Information. I understand the Design rules and guidelines a little better now.
Thanks everybody for answers. I have a general Idea now how to approach my problem, but please feel free to add more answers and information.
It’s all good information!
OK, so this is for a CRYSTAL layout. That complicates things because the goal is to minimize variations in load capacitance so you can have a good stable frequency over temperature. The PCB is temperature stable in the X and Y but not much in the Z direction. This distance will change with temperatures and will change the parasitic (stray) capacitance proportionally. The layout for a crystal may include a cut out that is located on a lower layer further away from the crystal than the regular ground plane. The larger distance reduces the initial value of the parasitic capacitance. The capacitance contribution from the PCB is now less and the load capacitance and is mostly set by the very stable capacitors you selected for load capacitors. Then you can get +/- 10 or 20 ppm with regular PCB material. Maybe better.
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