New DRC error with 7.0.10-1

Dear all,
I have a PCB which has got no DRC error with Kicad 7.0.1-2 (fc38).
I have updated with the latest available release for this linux version : 7.0.10-1.fc38

Now, I got new DRC errors which should not be there.
They appear on footprints with thermal vias like Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP4.1x4.1mm_ThermalVias

The error is the following (poor translation from French):
"The footprint type does not match with the pad type of the footprint (expected through-hole, real SMD)
The footprint is really a SMD one.
If I edit the footprint I can read that the expected type is SMD
So I don´t understand why this DRC error occurs.
It looks like a bug but I am not sure.
Does anyone see the same behavior ?

Best regards

Through-hole pads inside a SMD footprint should have set the fabrication property to “heatsink”. I can’t test this right now, but I think this should suppress the warning.

Thank you for your answer.
The problem is that I have only choice between “Through-hole”, “SMD” and “not specified”.
Nothing related to “heatsink”…
By the way, it gives an error, not a warning.

Best regards

In the PCB panel, click the Green PCB icon at top Left, and select Design_Rules>Violation Severity… there you can set what you want…

Sorry, I misunderstood the previous message.
Indeed, in the footprint editor, I can change the pad property to “thermal something”. And then the error goes away.
So I conclude that all the footprints with thermal vias in the official libraries are corrupted and should be corrected.
This is clearly a bug. no ?
I can do a local copy on my machine and edit the ones I need but clearly it is not the optimal way to go…

Best regards

The problem is that I have only choice between “Through-hole”, “SMD” and “not specified”.
Nothing related to “heatsink”…

Jonathan was referring to the settings of the pads (doubleclick the pad) in the fp editor.
You have looked in the footprint properties.

Yes, I have understood the point.
But I am using the official footprint libraries and the footprint should be OK there, shouldn’t they ?

It’s a known issue in the library. I believe they’re fixed in 8.0 (but I’m not a librarian).

In the meantime, you can either correct your library footprints, or set the violation severity to ignore (and you’ll be right back where you were in 6.0).

Thank you very much !
Yes, I will go this way.
By the way, is there any place where all the “known issues” are reported ?
It would certainly avoid such questions as mine :slight_smile:
Best regards,

For the application: Issues · KiCad / KiCad Source Code / kicad · GitLab

For the libraries: Issues · KiCad Libraries · GitLab (though a lot of these are uncategorised so the label filtering isn’t as successful).

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Where from is the need the part be specified as SMD or THT?
If it is needed than may be there should be third kind of part like “SMD partially THT”.
USB-C connector needing holes to solder its case and having SMD pads would be such kind.
What is the purpose of such error (detecting that you marked footprint as SMD and used THT pads in it)?

purpose (my interpretation): if you falsely assign a footprint the SMD/THT attribute that footprint will be missing in the pick&place file. So this could be a potential useful check.

That said I for myself have disabled this check in my projects.

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It was also my first thought, but… Do the DIP packages were not also pick&placed?
If SMD = part is pick&placed the THT pads in its thermal pad should not collide with it being SMD.
I have checked that I will also be getting this error and I will probably also simply switch it off.
I don’t understand why to question definition of SMD footprints. If it is P&P then it is marked as SMD even if it needs some holes - why KiCad cares about it?

Not with a SMD pick and place machine. I used to have Panasonic machines to place DIP and the boards needed special oversized hole footprints. These days the odd DIP part gets hand inserted

regarding :
“Through-hole pads inside a SMD footprint should have set the fabrication property to “heatsink””

Please help me understand why we need this restriction / requirement anyway ?

The properties are exported and might be helpful to manufacturers or other tools in some cases. Also as we’ve discussed, they affect certain DRC checks. For example castellated pads are allowed to intersect the board edge, heatsink pads are allowed on SMD parts, and so on.


Didn’t know that. Probably it is a time to read KiCad documentation once more :slight_smile:

I find it unusual, but that’s just because I am used to doing things a different way.

It seems in Kicad, things you are allowed to do, are permitted for some objects. Like castellated holes at board edges. This is a bit more difficult to guess what the tool might do.

In Altium, everything is prohibited . Only things you put into the rules are permitted. Most pro tools are very tightly rule based with exception only by rule.

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