This can be seen in previous post
but it does not clear to me. My NetTie footprint
And DRC results
Should I update my footprint or override the DRC errors?
From that same thread:
Split GND zones are one of the stubborn misconceptions that refuse to go away.
For the rest…
I seem to recall some things changed for net ties, either already in KiCad V7 or in the coming V7.99. Can you make a small test project in which this net tie is used and upload it here? Then I (or others) can have a look on what causes the DRC violations.
Not withstanding whether split return planes (pours) are a good idea or not, as you have observed, something changed between KiCad V6 and V7 in how net ties are handled during DRC.
It’s the polygon connecting the two pads in the net tie that is being flagged as a violation in V7. One option is to relieve the pours to provide the necessary clearance between that polygon and the associated pours.
Another option is to make both pours part of the same net and then separate them adding an overlap where you wish the connection to be.
Looks very much like this issue opened in February.
I also loaded your net tie from the PCB into the footprint editor, and I do not see any pads in it. Without pads, KiCad can not connect it to the other things in the netlist.
For the rest, I suggest you go watch a few of the video’s / seminars from Rick Hartley. All those split GND zones look bad to me. How long have you been designing PCB’s like this? And when did you do a refresher course on how to do treat GND on a design?
Sorry, the NetTie used is for an internal layer so I had to edit the F.Cu footprint with a text editor in order to change the layer. I’ve done this in V6 but I don’t know if it is possible in V7. In V6 this worked perfectly and I didn’t have any problems with my design. Anyway, forget the attached project. You’re right, it’s the same issue opened in February and not closed yet.
Regarding questions related to my experience and the time I have been designing PCBs…well, It’s something you would have to ask the ADI engineers for the LTC3889 Evaluation Board because I have copied the board practically 100% from the design files (see image below). I think they have a bit of experience and know what they’re doing, don’t you think?
Thanks for the recommendation to watch the videos but I don’t have much time for it.
BTW. I have also seen some comments with certain reluctance about GND separation. In some cases, for example in certain switched regulators, it is essential.
If these considerations are not taken into account in the design, the implementation will surely not work.
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