I’m trying to follow the recommendation on the layout section of BQ24259 datasheet.
I haven’t been able to come up to how to do it with a net-tie, given that the whole thermal pad is single net.
I tried placing the net-tie through hole footprint on the thermal pad, but understandably I get DRC errors for clearance.
I’m now trying to figure out if I could modify the actual footprint to do that, but also can’t think of how to do it.
Is there proper way to achieve this?
I don’t understand what the problem is.
There’s only one ground net - just add some thermal vias in the pad and call it a day.
Are you referring to this layout example?
(It’s from the datasheet you linked to)
It does not use net-ties at all. Just a continuous GND plane on the second layer, and some small GND sections on the top layer which is connected with via’s the rest.
Can’t you just do this manually?
Don’t use two different ground nets - use one, and manually route the analog ground to the pad.
You know - that’s a terrible datasheet.
Where is “analog ground?”
Can you show me? Because, there are no pins called that.
Can’t you just do this manually?
Don’t use two different ground nets - use one, and manually route the analog ground to the pad.
I thought about it, but the problem is that I have a 4 layer board and the two inner layers are GND, so any vias I place will stitch them anywhere, rather than at the thermal pad. I could still fabricate a more intricate GND pour avoiding any areas where I have vias that should only connect to the “power ground”, but wanted to know if there is a good way to achieve this.
I agree the datasheet is pretty bad and have to interpret this from bits and pieces here and there, the two grounds would be the two different ground symbols on the application circuit, so PGND, REGN and TS are on the “power ground” plane, where the switching regulator is, and the other ground would be everything else, including the actual device circuit. All GND in the layout section is the charger “power ground”, with the other ground not depicted. (that’s my interpretation at least)
After testing for a while, I figured I can achieve this with a net-tie footprint like this, not sure if the right approach.
Not sure if this would be helpful:
But in at least one layout I put a net tie onto an internal layer. KiCad does not (or at least did not) quite do this because a net tie is a component=symbol+footprint.
But I think I used notepad to text-edit the footprint file. I believe it is this footprint.
Not sure if it will help you but it did what I wanted without causing problems…
Net Tie 1.5 x 1.0_internal_2.kicad_mod (845 Bytes)
