I’m using the bus for the first time but I’m either doing something wrong or there’s something wrong with it? I get the message “Warning: Net XXX is graphically connected to bus / but is not a member of that bus”
But it is in fact connected, you can see PA15_MISO_RX on both chips connected…
I already searched through the forum but wasn’t able to find a solution. More people who asked this question but never a solution for the question.
Can anyone help me out here?
It’s also strange that it’s no reporting this warning for all connections to the bus while I made them exactly the same way…
You need to label the bus as well. The bus entries alone are not enough.
And how exactly do I do that? I press “L” to label the bus and just give it a name?
I tried that but it didn’t make any changes to the ERC results…
Adding a global label to the bus seems to help. I just tried adding a global label with the name PA15_MISO_RX to the bus and now it’s no longer throwing that warning.
Do I really need to add all labels, for alle pins, to the bus? It will become quite a lot of labels I need to add to that bus and will be a mess…
Oh. Wait. It is still throwing that warning but not on the pins to the chip. It’s now a warning on the global label. Haha…
I’m really stuck. I don’t know how to get this fixed 
Because they are normal local labels.
Have you read the documentation? Schematic Editor | 7.0 | English | Documentation | KiCad (under “electrical connections”)
Teletypeguy has a complex example. Here’s a simpler one:
The labels are normal labels, just with some syntax using {} and dot.
On the other hand, it’s just a warning. If you want to use only simple local labels and use the bus line only as a graphic decoration, go ahead and suppress those specific warnings. There’s nothing wrong with that.
I didn’t define any bus members manually. I thought connecting the pins+labels to the bus was enough, but that’s clearly not the case.
I’m going try with that.
In previous KiCad versions buses were only graphic items. If they were at schematic or not was not important to KiCad. They were only to help you to see were you can expect the other end of your wire going to the bus.
Now buses can know what wires they are allowed to have and check if you didn’t did a mistake.
I’m not sure since what version buses became more than only graphic as I don’t use ERC. I am still using them old way - no labels on the bus.
As written before, Implementation of buses in KiCad changed quite a lot. From not more then a graphical line, to containing real signals. The simple graphical line “worked” on a single sheet schematic, because the local labels were connected anyway. But now a bus is getting more sophisticated, you can also connect a bus though hierarchical sheets.
And because this way buses act is relatively new, it is bound to have some rough edges. If you first create a bus alias and add signals to the bus, then you can right click on the bus and use the “foldout” with the right mouse button to get one of the signals out of the bus. This prevents double typing and typing errors, and these are good things.
But the other way around is not implemented (yet?). I am not sure if there is any advantage of this “Net is graphically connected, but not a bus member” thing. What would go wrong if such names are automatically added to the bus aliases? Or, less automated, have some setting to define what KiCad should do if an already labeled wire is connected to a bus. (Refuse, accept, ask?)
There are plenty of opportunities for improvements here. For example for the bus alias list, it would be nice if KiCad also showed a list of how many times each label was used, and on which pages.
If you have other ideas about this, you can make a feature request on gitlab. But always search the existing issues first, as there may already be a feature request with the same, or a similar idea.
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