Is it possible to create net classes directly in EEschema instead of pcbnew/design rules ?
I have a lot of differents nets which must have the same properties (50 ohm), and the only way I’m thinking of is naming each net and identify in pcbnew/design rules. This is not very practical : I got hundreds of nets, and it’s hard to find a name for everybody 
!
Thanks !
Each net needs to be unique in the netlist so that the layout program knows to hook pad 1 of R34 to pad 6 of U3 and so on. I believe this is why the grouping is done only at the layout stage.
I think a practical way around this would be to name all of the nets that you think will be in the same class with a prefix that defines that class. For example, name all of the nets that require 50 ohm, “50ohm_SPI_MOSI” or more generally “50ohm_xxxxx”. This will cause these all to bunch when you go to assign the netclasses in layout:
As shown there, using hierarchical design will also assist in separating the various components of your design (though those shown signals are mostly the ones passing from one level of hierarchy to the next).
I can’t seem to name my nets, where is this done?
In case you didn’t solve this one, you can override whatever EESchema decides to name your net by using the “Place Label” (Shift + L or the button on the right side of the screen), which will place a local label to be used in the current sheet only OR you can use “Global Label” (Alt + Ctrl + L or the button to the right), which will connect to all other sheets in the project.