Hello
when designing power PCB it will be useful to set the clearance between NET CLASSES.
Is it possible in KI CAD 6.0?
Thank
Is it possible in KI CAD 6.0?
Yes.
In case your next question is “how?”:
- you need to work with custom rules in board-setup->design-rules–>custom rules
- look at the syntax-help in this dialog-window
- I recommend also to read completely this thread:
KiCad 6.0 custom design rules for HV clearances
thank you 
I will try to use your reccomendations
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