My first try to design a SoC board-Please review, discuss about it! ( I have shared my design under CC BY-SA)

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What kind of rules or limits your chips have regarding high speed routing? What kind of part placement do the manufacturers recommend
When you know the answers to these questions, you board has more changes to work.

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It’s only DDR3 or DDR4, like around 1Ghz signal

I were trying to use JLC’s rules as manufacturer’s limit

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But what DDR manufacturer says? Check their application notes about routing. 1GHz or DDR routes can have clear and strict rules how they should be routed. JLC does help there.

JLC does help there.

Edit: JLC does not help there.

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I have messed my message. Sorry about that. JLCPCB knows how to make pcbs, they don’t know if those boards work or not. A PCB maker may notice some stupid errors, but not always even those.
Your, as a designer, job is to check if there are critical tracks, and how they should be routed. And then make your board so.

CPU and DDR manufacturers have application notes and other info about how the chips should be routed. That may well be critical.

You can always Google “routing DDR memories”, or something

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Yes, I have learned, but I need some kindly heart one to review my drawing. ( Or teach me :smiley: )

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I’m not a high speed signal designer, however I know layout is critical.

You should Google “how to layout DDR4 memory module”. I didn’t post a link because there seem to be a number of good hits.

To get a taste of the theory look at presentation by Rick Hartley

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