Mutiple grounds, vdd, etc

First time forum member. Long time Eagle 5.x owner. Trying KiCad for
the first time. Everything seems pretty intuitive so far.
One thing though…
It makes no sense to me not to have a way to design a symbol with a
whole bunch of power and gnd pins, and have most of them NOT show
on the schematic. Eagle does this by using the @GND feature (@VCC).
I just designed a symbol for the AD ADG904 part, and it has a ridiculous
11 GND pins on a 20-pin part.
It seems that one should be able to put something like: 3,5,6,8,9,11,12,13,15,16,18 in ONE pin description for GND ???
I looked at another MCU and saw that it listed all of the gnd and vcc pins on the symbol. That got me worried!

I think people stack them and then un-tick the “visible” box.

Thanks Hermit, I will try that.

Very important remark: Do not under any circumstances use power input as the electrical type for the pins you hide as that would make them global labels.

More details: Electrical type of schematic symbol pins (KiCad 4 and KiCad 5)


Wow, that is quite the caveat. Thanks for the reference


Sometimes having all the pins explicit is helpful, particularly if you are debugging a circuit from schematic it can help identify probe points if you know that EP, and Pin 3,4,5,6,10,12 are GND. It is quite a bit ugly, aesthetically but it is quite common to see a seperate power symbol for an MCU consisting of 40 ground pins in the industry. Explicit means fewer errors in some instances.

On the other hand, for other users it is excessive and verbose, depends on what you are going for.

It might mean fewer errors on one side but opens up errors on others. For example a designer might forget to connect one of the ground pins or worse connect it to the wrong one. Which is something that can not happen with a stacked pin setup.

In my opinion stacking pins moves part of the circuit correctness responsibility to the library designer. Which is a good thing as the same symbol will be reused many times and therefore only increase in quality.

And yes for input pins it is “only” preference and possibly a decision in who is responsible. (Meaning it is mostly a political not a technical decision.)

In other instances like power output or any other output type it is the only option for ensuring ERC works correctly.
In a non stacked setup you would need to decide if you want to give all pins output type which will result in false error reports. Or if you assign only on pin with that type. With that setup it becomes possible for you to connect one of the non output marked output pins to another unrelated output without ERC complaining. (which could result in a short circuit at run-time)

The solution is to stack pins and only give the visible one output type. (This avoids the problem with false ERC reports) The second problem can not occur here as it is impossible to only connect one of the non output pins of the stack.

And if you already stack pins for this use-case then you might as well stack them in every instance where it makes sense as everything else would simply be inconsistent.

What would be nice would be a way to clearly communicate that a stacked pin represents more than one pad. I assume the new file format will bring such options and possibly many more.

Not trying to start a debate here, for common purpose libraries I see no reason not to stack, and I do both myself .

Sometimes, in my opinion, it simply depends on the intended user of the schematic, if the end user doesn’t have kicad or Eda tools in front of them, say a rework tech or fa engineer at the manfufacturer and if you are trying to find a probe point or a wire tag point from the schematic, being able to read off the schematic that you have 4 GND points on a component can be helpful.

As you point, perhaps A visual indicator of a multiple connected pin or listing of pins is preferred to a subpart dedicated to GND pins, but whatever . Take what I can get

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