Explanation and purpose of being able to do so:
There have been situations presented on this forum where people have wanted either multiple individual PCBs or be able to have multiple PCBs on the same panel. The panel layout would be provisioned with V-grooves or mouse bites and routed slots in order to break the panel apart into individual boards.
The scheme uses what is called “mechanical-boundary” lines to segregate the different assemblies. Mechanical-boundary lines are long-short-short-long-short-short-long etc. lines, which in mechanical drawing parlance is a phantom line. The assemblies have reference designator prefixes applied as appropriate so that only basic reference designators are within an enclosing mechanical-boundary line, and only the basic reference designator would appear on a PCB. The criteria for these lines would be like the criteria for edge.cuts or courtyard outlines in that they would need to be continuous/no breaks. A PL/BOM printout would have the reference designators in alpha numeric order including the reference designator prefix(es).
I believe you would find that KiCad would be a cut above all the “professional” (read that as costly) programs such as Mentor Graphics offerings, Mentor Graphics PADS, Altium, and others.
I know that KiCad can not presently do what I am proposing. That is why I was posting. The title of my posting doesn’t properly cover the subject area and that is why I tried to do an explanation. Maybe I need to repost under a different title such as “Multiple PCBs”.
Some of those diagrams in your link are electrical and some are a cross between an electrical and mechanical depiction. I can almost read the graphic symbols as I am familiar with IEC 60617 through the use of IEEE 315A. The reference designations seem to be that of IEC 81346-1 and -2. I will say that whoever did the drawings did not follow IEC 80000-1 as far as SI nomenclature. For instance “DC24V” should be “24 V DC” and “0.5A” should be “0.5 A”. Two rules of SI are: There is always a space between the number and the following SI letter symbol and you make no attachment to the base letter symbol (that is why there should always be a space following the base symbol).
–Regards, Larry
IEC 80000-1 … probably because that nomenclature has drawbacks. The spaces if used in an application that does not highlight the text field can cause confusion and is less compact additionally making it unsuitable for dense drawings.
Such nomenclature certainly isn’t industry standard… the thing about IEC or IEEE standards is they come and go and some are never widely adopted.
It’s like the old saying about dotting your i’s and crossing your t’s. Besides IEC 80000-1 there is ANSI/IEEE/ASTM SI 10 and NIST Special Publication 811. The IEC standard and the ANSI/IEEE/ASTM standard you have to pay for, but NIST, which comes under the U.S. Department of Commerce, which you can get to at <www.nist.gov>, has SP 811 as a no charge (as in free) pdf download. All three of these publications (standards) follow the BIPM SI Brochure, which the 9th Edition was published 2019-05-20. The SI (System International, the modern metric system) is a defacto international standard not only for science and engineering but for international trade. [The United States is a Member State of the BIPM and may be an original signatory.]
–Regards, Larry
Here is a more extensive explanation of what I am trying to achieve and what I think KiCad should be programmed to do, in order to obtain individual PCBs from the same schematic diagram.
I had a project that required three printed board assemblies (PBAs) that were partitioned as follows:
A Front Panel PBA, A Rear Panel PBA, and A Main PBA.
The system subdivision diagram, based on ANSI/ASME Y14.44, Figure 7, with reference designation prefixes added, looked like the following: Me10027p1.pdf (20.6 KB)
And the schematic diagram would be like that of ANSI/ASME Y14.44, Figure 3: scan0013.pdf (514.8 KB)
Notice in the figure that all the graphic symbols use basic reference designations with the assemblies/subassemblies segregated by mechanical-boundary lines [Mechanical-boundary lines are the long-short-short-long (repeated) lines that surround the circuitry. In mechanical drafting/drawing these are called phantom lines.]
In the figure you will notice that there are four components with a basic ref des of J1. For the complete ref des follow GENERAL NOTES: (a) instructions. Thus you would have 3J1, 3A1J1, 3A1AR1J1, and 3A2J1 and this is how these parts would be listed in a parts list (PL) derived from this schematic diagram.
As there have been other postings of users wanting multiple PCBs from a single schematic diagram, can KiCad’s Eeschema, schematic capture program, be programmed to implement this functionality? How do I go about submitting an official request for same?
–Regards, Larry
