Multiple identical pins internally interconnected? Pcbnew can't see it

Stumbled upon a similar problem with this panasonic relay.
[Panasonic Relay] (https://www.google.de/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&cad=rja&uact=8&ved=0ahUKEwid9LS1tpLSAhXDbhQKHRNWB90QFggfMAA&url=http%3A%2F%2Fwww3.panasonic.biz%2Fac%2Fe_download%2Fcontrol%2Frelay%2Fpower%2Fcatalog%2Fmech_eng_lz.pdf&usg=AFQjCNHDY8P-mpIOr58nN9QnjEIvuIKciw&sig2=-Lpflue5bEMiWuNoAmdKAQ)https://www.google.de/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&cad=rja&uact=8&ved=0ahUKEwid9LS1tpLSAhXDbhQKHRNWB90QFggfMAA&url=http%3A%2F%2Fwww3.panasonic.biz%2Fac%2Fe_download%2Fcontrol%2Frelay%2Fpower%2Fcatalog%2Fmech_eng_lz.pdf&usg=AFQjCNHDY8P-mpIOr58nN9QnjEIvuIKciw&sig2=-Lpflue5bEMiWuNoAmdKAQ

As you can see 2.1 Form C Type has internally connected COM, N.C. and N.O. Pins.

I made my schematic symbol like this.

I wire them how I need them in my PCB-Layout.

Is this the best solution for this kind of problem?

current carrying capacity?

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No, they are rated for max. 440 VAC or max 16A, not both. They are rated for 4 KVA with a resistive load, not 7 KVA. Current carrying capacity drops rapidly beyond about 25 VDC.

Those pins are only 0.5 mm dia. (.2mm2) so those ratings are based on both pins being connected.

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Have you read your post?

I can’t understand why (virtually) nobody understand the real task. From an outside view (I’m just a hobbyist) this shouldn’t be worth more than 3 lines. There are so many components outside in the real world with inside linked pins. It shouldn’t need more than 3 clicks to connect them virtually inside the Footprint.

I get a headache here routing a switch matrix. The PCB is very tight. This shouldn’t be a problem if I could use the 4-pin-switches also as bridges. These are very common tactile 4pin Switches. Every switch has 2 paires of 2 pins connected inside. As they operate at very low current, it shouldn’t rise a problem to "mis"use them as Bridge or Jumper.

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Tekkx, bit of necro-posting on your part.

The divide comes from the fact that the DRC is correct in this situation. Its job is to alert you to any pins that share the same net, but are not connected on the board.

To flip the situation, what happens if someone says all of a micro controller ground pins are linked internally. Its safer to say no this is an error. I much prefer it does and leaves me to choose to work around it. If i end up making a mistake, well then its on me.

There are 2 ways to easily work around this,
1: Create your own part with different pin numbers for the internally connected pads, e.g. 2a 2b, and plonk a No-Connect to the one you don’t want to connect to.
2: edit the pad you don’t care about and delete the net entry. It no longer has a matching record so is treated as a Not-Connected until you re-import the netlist.

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For most such components you must always tie these pins together on the outside. In most of these cases this is either because of EMI or current capacity.

For relays it is the later. (As @1.21Gigawatts mentioned) For most IC pins it is the former. Always connect all GND pins in the shortest possible way to ground. Don’t ever use two GND pins to jump over other traces. The same is true for VDD pins and of course for all other pins that are there multiple times.

Always remember: Bonding a package pin to the chip costs money. So if a pin is connected to the chip the manufacturer has done so because they found it is necessary that the chip is connected at all these pins.

For relays something similar is true. It also costs money to have a pin that is connected to the internals.


If your component for some reason does not need the internally connected pins to be connected externally then you can have two pins in the schematic and don’t connect them in the schematic.

Example have a NO1 and a NO2 pin. And for them not to be connected you need a NO1 net and a NO2 net. (Two different nets. In the picture by simon just remove the connection between pin 5 and pin 4)


Edit because you edited your post while i wrote mine:

Depends on your usecase really. If you have high frequency (>10kHz) signals using the internal switch connection might not be a good idea at all. (EMI)

If not you need to tell kicad that these are different pins. (Most switch footprints have the same pin number for both connected pins.)
You then need a switch symbol with four pins as well and connect them as you please. (But don’t tell kicad you need the two internally connected pins to be connected. Otherwise you are back at square one.)

Maybe there is a problem in communication. I’m not a native english :slight_smile:
So I have no idea, what “necro-posting” means. If it means, I posted on an outdated post: The problem isn’t obsolete to me.

Rerouter, I also understand your proposal “No-Connect” as the oposite of “already linked inside”.

I did my very first steps with KiCad (switched over from Diptrace - which has it’s own problems not to discuss here).
My basic question is: If KiCad struggels at such a simple task (connecting two pins outside the copper plane), what’ll happen if it gets serious?
I am far away from insulting KiCad, cause it’s free and open.
What makes me slightly upset: it looks like nobody (virtually) understands the task.

There should be an easy way to tell the program, “these pins are already linked inside the component, you don’t have to/you mustn’t route them again”. That simple.
I love the idea of a “virtual-copper layer”. Thank you, PCB-wiz.
Concerns about current rates or other (e.g. EM-) side effects should kept in the responsibility of the designer. No matter if there is a battery holder, daughter board, micro-processor or even a simple switch.

Yes necro-posting is the act of digging up a very old thread.

I see the issue as one of defining it to the DRC, To me it is definitely and edge case, where defining it with separate pin numbers in the schematic level would ensure that it cannot come back to bite you later on.

Essentially by having one pin set as not connected, you have told the program that they don’t need to be linked, if they do you modify your schematic, push through the netlist and now they are linked.

If you really wanted to use the tool in the way your hoping with the virtual plane, you can change the project to a 4 layer board, route the trace and then change back to 2 layers, it does not delete the routing on those layers. but i warn you, this will come back to bite you if your not careful, and is not recommended

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Upgrading the PCB to 3 or 4 layers (even if temporary) is the wrong way.
The clean solution should be to add one (or if necessary more) conductive layers to the component in the Component-Editor itself. Unfortunately I wasn’t able to find out, how to do this.

If I have a component in my hand (no matter if it’s an Arduino, a switch or a piece of copper wire) with two or even more physically linked pins: wouldn’t it be dorky to twiddle a workaround with extra layers on the board?

I am the only one who’s able to see that?
And what will show us the fact, I had to dig out this very old Thread?
Maybe I am the stupid myself.

Read my post. I told you the way to tell kicad that this is the case.

I also outlined where you can use this without problems. Now lets look at your examples:

Most likely either there are multiple pins for current capacity or simply for mechanical stability. If it is the later you can without problems ignore one of the pins electrically. Make a symbol and footprint that represent this fact. Or use the Not connected workaround posted by @Rerouter (The workaround is where you remove the net in pcb new from one of the pins.)

Here you always need to connect all pins together. In kicad this can be done by either stacking the pins in the symbol (preferred way). Or by creating a custom footprint that has the same pin number for all these pins. (This is how the switch footprints in the official lib are currently made.)

What is pin stacking?
Putting multiple pins on top of each other where only one pin is set to visible and all other pins are invisible. They normally have the same pin name and electrical type.
Be careful when stacking power input pins though. There the hidden pins should not be of type power input because hidden power input pins are global labels. (Yes this is a dirty hack but we need to live with it for now.)
And similarly output and power output pins also need their hidden pins to by of a different type to make ERC happy. (preferred way for these exceptions is to use passive for the hidden pins.)

Depends on application. (Current capacity and frequency of your signals)
Again if you think your application permits the use of the switch as a bridge you need a footprint that represents this fact. (The footprint needs different pin numbers for the pads that are internally connected.)
And the symbol needs to represent this fact as well. (It also needs more than one pin to represent the connected pins)

You then can tell kicad in the schematic what specific pin should be connected to what part of your circuit. This is as you already said the responsibility of the designer.

Why is it hard to do so? Well the switch footprints that are in the official lib have the same pin number for the internally connected pins. This allows the use of only one symbol for all switch footprints but makes your usecase impossible.

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Thank you, Rene.
This is a lot of stuff I have to chew on. :slight_smile:
That’ll take a while, as I am new to KiCad (as I told before).

I’ll report if this set me on the track. Promised!
Again: Thank You. :slight_smile:

Tekkx,

this is “my” thread (I was the original poster) so I thought I’d let
you know that I do understand you perfectly what you want to achieve -
as I also wanted to use the different internally connected pins as
bridges.

I am not sure if I ever posted my work-around so here it is: I mark the
pins as different ones (RX1, RX2; TX1, TX2; GND1, GND2) and then when
designing the schematics I simply use the fact that I know the e.g.
GND1 and GND2 are interconnected.

I know it’s a bad approach, it’s totally cryptic, unreadable to others
etc, but it keeps DRC happy and the final PCB works the way I want it.

Petr

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Sorry, Petr. :sweat_smile:
It wasn’t my intention to hijack your thread. I was searching for a solution and encountered this here.

I mentioned that I was the OP only to explain why I have the courage to
post an obviously wrong (yet working) work-around.

Feel free to use it. It takes a bit of imagination when drawing the
schematics (I often modify the schematics to ease the manual routing
later) but it works and Kicad is happy with it.

Petr

Isn’t a virtual plane one that you route and then omit from the gerbers you send to the production house?

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It’s simple enough to draw wires to the pins

but then you have to route a path on the PCB between those pins, right? Otherwise DRC complains.

read his post again.
The whole post not just the one line you quoted. And then read my post again. The whole post not the part of it that satisfies your bias in thinking that this task is unreasonable hard in kicad.

Have you done that?
What is the conclusion you come to?

I will help you.
It is easy if you make your footprint and symbol in such a way that this task is possible. Namely you need one pin in the schematic for each pin of the footprint. Then you can deside which pin you connect to wich part of your schematic. Of course if you draw a wire between these two (or more) internally connected pins, kicad assumes you want them connected on the pcb. But this is not what we told you to do.

Kicad and no other pcb tool i am aware of cares about the fact that something is internally connected. If you tell the programm in any way that two things are connected it will hold you to this decision by complaining about a non existing connection.

Rene, read hist post, your post, my three hours old post and my previous post again. You’ll see I understand you all pretty well, I have even been using your suggested solution for almost two years now.

Yet Andy suggests something (“draw wires, that makes it clear”) that is weird - if by “draw wires to pins” Andy means to interconnect the internally connected pins then it breaks the idea of a bridge. If it means something else then it’s not clear to me - how can one draw wires to be clear yet not connect the pins?

Yes andi was not as clear as he could have been. What he meant is (Or at least what i assume he meant):
Draw the wires as you want the connections to be on the PCB.

Your custom switch symbol will need a red symbolic ‘wire’ going from one pin to another, the ones you intend to be connected, to tell people that this is intentional and you’re using the internal connection.
You do NOT draw a green ‘wire’ from one pin to the other in the schematic and nothing in the layout or the footprint.
Your schematic will have two distinct nets then at each pin, but looks logical and works within KiCAD now.

We have had discussions on this in the past, so it’s not new really.
The current symbol/schematic framework isn’t able to do this and the devs have been working hard to change that, but it’s still a lot to do.
At some point in the (far) future symbols and their pins will have more advanced features, that should enable to pre-tie symbol pins together and set up rules for this per symbol which would make this more elegant and enable ERC/DRC access to the intent of the designer (while keeping the different schools of thought possible @Andy_P mentions up there), but don’t hold your breath.

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