I’ve read through previous discussions on this topic. Some of them are quite old (<= v5 era), and I haven’t seen my particular situation addressed. I’ll be working with KiCad 8.0, but am willing to use 8.99 (yes, I know, experimental) if there are changes in it that will help.
I’m about to start the design of a board with many replications of the same I/O interface, consisting of 1/8th of a 74BCT760 o/c buffer, 1/8th of a 74LVC244 p/p buffer, and a MOSFET and resistor forming a switchable terminator. This seems an ideal candidate for a hierarchical sheet with A and B I/O pins, a direction pin, and a termination control pin.
I’m willing to create my own symbols for the two chips with multiple units.
The problem is the 74BCT760 and 74LVC244 each consist of 8 buffers, with two output enables each controlling a group of four buffers. How do I handle the shared OE pins in the symbol definition? And once this sheet is instantiated in a higher-level sheet, how do I handle assigning unit letters to devices?
From my time poking around in that code when implementing the component class stuff, I don’t think KiCad will correctly handle multi-part symbols which are split across multiple hierarchical schematics (which is I think what you are suggesting doing here).
I’d make a a hierarchical schematic which has 8 channels, each using 1 of each of the ICs.
Please explain further. I can see how trying to split it into eight schematic units would be a problem (that’s the whole point of my post). @JamesJ’s suggestion seems like a safe, if annoying, way to address this.
However, these ICs have two independent OE pins, each one controlling half of the buffers. There’s no interaction between the two halves, other than sharing a package and power/ground pins. That makes it very similar to a 7474 dual flip-flop, which also has two independent schematic units. If there would be a problem splitting these into two units that I’m not seeing, I’d really appreciate the explanation.
My objection to your scheme has nothing to do with KiCAD features.
Your idea will probably work.
But what happens if you want to add, say, a 74xx373 8-bit transparent latch to your circuit?
It’s only got one LE input, so you can’t split it into 2x4.
An imaginary schenario, admittedly, but realistic.
Things start to get messy, no?
The problem is you can’t split schematic symbols across hierarchical sheets. So you’ll need the two OE lines to be connected to two separate sets of hierarchical labels / pins in order to use both in the repeated sheet.
Definitely works. When I’ve had to I’ve put different units of logic ICs on different sheets. The fly in the ointment is that the power unit (of packages that have been split across sheets) has to go onto an unrepeated sheet, e.g. the root sheet, or maybe a separate power unit sheet, otherwise it will be duplicated.