I do see some progress.
- All schematic symbols have footprints now.
- Schematic is free of ERC violations (except some missing librarie(s))
- Schematic and PCB seem to be linked properly.
- Decoupling capacitors seem t be closer to the LM675.
Now try this:
1). Open: PCB Editor / File / Board Setup / Design Rules / Net Classes and then make the rules for the Default net class a bit bigger. Set the clearance to 0.25mm and the track width to 0.35mm.
2). Set Via Size to 1.5mm and Via Hole to 0.8mm for both net classes to 0.8mm. Currently the “annular ring” (= widht of the copper around a pad or via hole) is set to 0.2mm, and this is a bit narrow for some PCB manufacturers. (And close the window).
3). PCB Editor / Edit / Edit Track & Via Properties and select the Set to net class values radio button: (and press [OK])
4). You have now made a lot of via’s bigger, and tracks wider. This will likely result in DRC errors. So run: PCB Editor / Inspect / Design Rule Checker and fix the errors. When you make tracks wider, this usually results in lots of DRC errors, but in this case there is a lot of room on the PCB and it’s not so bad. There are several ways to fix it:
5). Hover over a track and pres D for drag, then drag it out of the violation (this works sometimes).
6). Press X to start a new track, and route around the troublesome area. If PCB Editor / Route / Interactive Router Settings / Remove Redundant Tracks is turned on, then the old section is often automatically removed when a new track is laid.
7). If a track section is not deleted automatically, hover over it then press U to select a section and then [Delete] to delete it.
8). lmost all DRC violations can be fixed in this way, except for the two TO92 transistors. These have their pads very close together. You could change these for other footprints, for example TO-92-HandSolder:
9). When it’s free of DRC violations, run: PCB Editor / Tools / Cleanup Tracks and Via’s. After that, run DRC again.
10). These are just a few ways of using KiCad to improve your design, but as long as you keep using these locations of the footprints and the routing from freerouter it’s never going to become a proper PCB. For a proper PCB you also need to add a GND plane, and that simply can not be done with this footprint layout and track routing.
11). You are also still routing tracks under te ESP32 antenna.
12). Just curious, how much time did you put into this?
Have you read / followed the (quite long) LoPower thread for PCB improvements?