Please post your version info (Help → About → Copy Version Info)
Also please post the actual DRC errors you’re getting.
Sorry, version 6.99
[DRC2
DRC2.rpt (5.8 KB)
.rpt|attachment](upload://jYEZxHRy4gfHw3K9YpWH4QAFWbf.rpt) (5.8 KB)
I’m not on the bleeding edge, but the first thing that I would check is parity between the pin numbers on your symbols and the pad numbers of your chosen footprints. If, for example, you have a connector’s shield on pin number “SH” on your schematic and your footprint uses pad number “0” for all the shield connections, the shield connection will be broken. (Though I suspect without trying that the schematic to PCB transfer should flag this type of issue with a warning.)
Generally the “Missing connection between items” DRC error means you haven’t routed a track between the items in question. In the schematic, you told KiCad that these two items should be connected, but you didn’t make the corresponding connection in the board.
Have you added traces/zones to make the connections?
When creating the schematic I place each components lead to it’s proper connection on the component it is to be connected to. How else do you make a connection between components? Would the ERC not show an error if not connected properly? This is the first time for trying to create a pcb, so I definitely do not know much. Seems like the process of annotating and then assigning a foot print is where the problem is? So it would seem that choosing a symbol and a foot print for it from the library is complicated. I appreciate all suggestions and help for sure. I have to understand the software better!
gkeeth, Do you have to make a trace/zone for each component as you add them? I thought that connecting one component to another was doing just that as you create a schematic?
The schematic just tells the software which pins are connected to each other. Where you place the symbols in the schematic has no bearing on what your physical circuit board will look like.
Every connection that you make in the schematic then needs to drawn in the circuit board as a routed track (or a filled zone). This defines what your physical PCB will look like when it is manufactured. The connections must match what you put in the schematic, but now you’re drawing out how the copper connections will actually look. The board editor will check that the copper connections you have drawn match what is in the schematic. That’s the error you’re running into.
As an example, consider two resistors that are connected together in the schematic. Should your PCB have a short track between them? or a long meandering track around them? Or a copper plane? The schematic just says they’re connected, but doesn’t say how. The board design says how they are connected.
Since you’re just starting out I would suggest you start with a guide like this one: Getting Started in KiCad | 6.0 | English | Documentation | KiCad. There are others out there as well.
You may or may not be aware of this, but the version of KiCad you’re using (6.99 or “nightlies”) is an unstable development version. I would suggest you use the stable version 6.0 instead (currently 6.0.4). In 6.99, features are added relatively rapidly and may sometimes be broken, incomplete, or later removed. You may see crashes, and the file format will evolve as development moves forward. You will not be able to open designs edited in 6.99 in previous versions of KiCad, including the stable version 6 release.
gkeeth, I did read getting started in kicad, also the work flow chart, it did not say the routing must be done also in pcb. I will download the stable version and install it. You gave a more explicit explanation than the help file, thanks. I know I have a long way to go yet in understanding how to use the software, and also understanding the libraries. I just got a 3018 cnc and want to try making my own boards, but first need to know how to produce a file for it. Thanks again, appreciate your help.
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andy_p, I just tried the routing process, now that I know the difference and what to expect. Thank you too for your help.
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Update, I uninstalled all kicad files, downloaded version 6.0.4 and installed it. recreated the schematic, annotated it, assigned footprints, saved everything, and ran ERC with no errors exported net list. Started pcb editor, arranged the layout and ran connections between components after setting edge cuts for board size. Am getting errors for no connections and error: clearance violation (netclass ‘default’ clearance 0.2000 mm: actual 0.0000 mm) I have tried to find out where to reset this to default and can not find out how. I have went to edit pre-defined sizes and the net classes is set to the default sizes. How do I clear this error?
DRC.rpt (11.3 KB)
Please provide a screenshot of your board layout, or better yet upload the whole project.
For your reference, you can change the clearance settings for each netclass in File → Board Setup → Design Rules → Netclasses. However the error is saying that the actual clearance is 0, which means that two bits of copper that KiCad thinks shouldn’t touch are touching. Changing the clearance will not fix that.
Also, please make sure you’re following the updated getting started guide that I linked above, or another guide for V6 (and tell us which one). You’ve now made two references to things that were discussed in previous versions of the getting started guide, but not the new-for-V6 one that I linked, so I suspect you may be mixed up somewhere 
The current guide does not have a flowchart, although the previous one did, and since KiCad V5 it’s been recommended to use the “Update PCB from schematic” tool rather than exporting/importing netlists.
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gkeeth, I used the phrase imported meaning update from schematic, as I did once schematic was finished and error checked.So the net file is no longer used, and should not be created? I have deleted the project to start again, and have used, pdf pro, to make a copy of the new getting started with kicad help file. So no mistake can be made because of outdated help files, though I did use the one from your link before. I will try one more time and will post the whole project if it still is not correct. Thank you very much.
First:
It looks like you’ve deleted everything twice and started anew, but there is no reason to do so.
For example, KiCad V6.0.4 can just open a project made in KiCad V5.x without problem.
The use of netlists is indeed deprecated for the normal workflow and the Update PCB from Schematic [F8] method is the recommended method (for quite some years already).
I had a look at your error report:
** Found 24 DRC violations **
[clearance]: Clearance violation (netclass 'Default' clearance 0.2000 mm; actual 0.0000 mm)
Rule: netclass 'Default'; Severity: error
@(132.5450 mm, 105.4100 mm): Pad 1 [Net-(C2-Pad1)] of C2 on F.Cu
@(128.2700 mm, 105.4100 mm): Line on F.Cu
[clearance]: Clearance violation (netclass 'Default' clearance 0.2000 mm; actual 0.0000 mm)
Rule: netclass 'Default'; Severity: error
@(134.6200 mm, 105.4100 mm): Pad 2 [GND] of C2 on F.Cu
@(134.6200 mm, 105.4100 mm): Line on F.Cu
And I noticed that a lot of the Clearance violations are between pads and a “Line”.
I am guessing that you used PCB Editor / Place / Draw Line to draw connections, and that does not work. KiCad makes a significant distinction between graphics lines (even when on a copper layer) and copper tracks. To make proper connections you have to use PCB Editor / Route / Route Single Track [X]
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Paulvdh, The only way I create the PCB is by Update PCB from Schematic, I had read the new help files. At first I thought using the draw a line was to connect symbols in pcb also, but was corrected reading the new help file. Now I use the right panel “route tracks”, isn’t that correct or must one go to top panel, route, route single track? I have redone the schematic, and created a pcb, with only 2 errors, ([invalid_outline]: Board has malformed outline (not a closed shape)
Local override; Severity: error
@(161.5000 mm, 120.8400 mm): Line on Edge.Cuts) I am uploading the whole project as I have tried to correct the errors with no luck and searching has produced no idea how either. I use the (draw a rectangle) to enclose the foot prints after placing them. The rectangle should be a closed outline as it was created without any interruption in forming it. Gkeeth has given me a lot of help which I appreciate, I am trying to learn to use kicad, and this is my first try at it.
lna2.kicad_pcb (86.6 KB)
lna2.kicad_prl (1.1 KB)
lna2.kicad_pro (9.1 KB)
lna2.kicad_sch (45.1 KB)
lna2.zip (200.7 KB)
some points:
- attaching the project-archive is a good idea. It’s enough to attach the archived project (in2.zip), the other files are part (inside) of the zip-file.
- using the route-tool was the right decision. It’s not important if you use the icon in the right toolbar, the Route–>Route Single Tracks command or the hotkey (standard hotkey for routing: “X”). They are all equal and activate the same function.
- As the DRC doesn’t show a routing-error or a “unconnected item” error your routing was correct - well done
To get to the remaining “Board has malformed outline (not a closed shape)” error:
drawing a simple rectangle on edge.cuts layer is normally the completely right decision.
Sadly you shoot yourself with using the footprint SMA_Amphenol_901-143_Horizontal from the library Connector_Coaxial.
This footprint is intended for use on a board-edge. To help positioning this footprint the footprint itself already includes a small line on the edge.cuts-layer. You can see it if you enable the edge.cuts layer and switch the display-mode to “Hide” (right-side panel → Layer display options → Hide). Than zoom in on the footprint, you will see thicker line superimposed to your edge.cuts rectangle.
You have different options:
- fastest (but not recommend from me, instead I would say avoid it):
- doubleclick the SMA-footprint J1, get the footprint properties dialog, click Edit footprint
- this opens the footprint library editor and allows you to edit exactly only the footprint J1 (there should be a yellow warning at the top of the screen: “Editing only J1 from board”)
- select the problematic line on edge.cuts layer (for this: activate edge.cuts layer, select Layer display mode → DIM, than select all on this edge.cuts layer), delete all items on edge.cuts
- save the modified J1-footprint
- repeat the same for J2
- draw an board outline on edge.cuts-layer which includes the lines from the footprints:
- first delete your board rectangle
- activate edge.cuts layer, select line-drawing tool
- the line-drawing-tool shows snap-points on all line-end-points (only for lines on the current active layer). So move the mouse-cursor near the edge.cuts-line of the footprint, snap-point-circle appears, start drawing your edge.cuts outline. Draw a complete connected board-outline consisting of single lines. Include the line-segments of J1/J2
- create a customised copy of the original footprint SMA_Amphenol_901-143_Horizontal in one of your own user-libraries (similar to option 1. but permanently saved into a library)
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I agree with mf_ibfeew.
My preference would be the 3rd option to first put the SMA into a project specific library, then remove the line from Edge.Cuts (or move it to another layer). Then also change the Footprint link in the schematic to point to that custom library.
But there are a few more issues with the Edge.Cuts layer. At 1. there is a short line, and at 2. there are two very small rectangles.
If you remove those 3 objects then DRC runs fine and without errors.
A note about the schematic, are you sure you want to do this:
It’s more common to connect pin2 of the BAV99 to some positive voltage.
Edit: As davidrsb noticed this clamps the input to plus or minus a diode drop, which is perferctly normal.
If I look at the PCB though, I get the idea that you’re just experimenting a bit with KiCad and are not on the road to actually manufacture this project.
The back to back diode to GND is a common input protection for small signal inputs
I see a box on Pin 1 of the IC on he right, which means the wire from C1 is not connected
I see a box on Pin 1 of the IC on he right, which means the wire from C1 is not connected
No, that was only a trap from @jara8462 to test the forum members. At first I thought the same, but in fact it’s an doubled little net-stub. Not dangerous, only cosmetic. The IC1/Pin1 is correctly connected.
Indeed, the junction dot is on the attachment point of the wire.
If the pin was still open wit would have a dark red circle.
It’s still good to notice though, as it’s a bit sloppy (perfectly understandable for a beginner in KiCad) and these little squares and circles often indicate open connections.
In regards to the edge-board line as a part of the SMA footprint, I would personally use mf_ibfeew’s second option.
My reasoning is based on an assumption (you should double check with the datasheet of the SMA connector) is the board edge line in the footprint is based on the suggested board edge location from the manufacturer of the SMA connector. Unless I have a compelling reason to ignore the suggestions from the manufacturer’s datasheet I tend to follow them.
It is up to you as the end-user to double check that the implied suggestion of the board edge in the footprint matches the datasheet. The volunteer librarians in charge of the KiCad libraries are very good, but they are only human. I tend to trust but verify their work.