Do you know the size of hole in stencil that have to be divided into smaller once?
I came to that doubt when modifying QFN-48-1EP_6x6mm_P0.4mm_EP4.3x4.3_ThermalVias footprint.
I replaced 0.2mm holes with 0.3mm.
I decided to reduce their number from 4x4 to 3x3 (to let VCC copper at inner layer to get between these vias).
My first idea was to have 4 octagonal holes in stencil. Like one on the right - it is 1.6x1.6mm.
But it looks huge compared to holes for 48 pads. I started to think if the tool (never seen it) used to spreading the paste isn’t too flexible and doesn’t take the paste from the inside of such a large hole.
So may be it should be done with smaller holes - I put some rectangles on the left to show that idea:
Do you know how it should be done?
Reading about how much paste at exposed pad I sow data from 25% till 80%.
As under QFN the paste has no place to run away than may be in this case it should be closer to 25% than 80%.
Is someone knowing it?
The reason to divide a large hole into smaller ones is to provide a place for flux vapors to escape when heated.
Work with your PCB assembler. They will know what works best for their process.
He answered me mentioning one more problem I hadn’t considered. When the machine places the element, it presses it against the PCB and the paste can be pushed out, which can lead to short circuits. This leads me to the conclusion that the rectangles on the left are too close to the edge of the EP.
But they have holiday so we will continue next year
I’ve never done it myself, but I know it’s a delicate balance.
For example, paste can be pushed aside, but the remaining paste will never be thinner then a single layer of solder balls, so this will also depend on solder ball size.
It’s also possible that the IC floats on the GND pad and is too high above the PCB for the other pads to make good connections. For the other pads, the solder flows around them, but for the GND pad it has nowhere to go.
There is also no need to solder the whole area. I’ve seen some websites that claim that it is good enough if about half the size of the GND pad is soldered. (verified with nice rontchen photographs).
I did a bit of reading yesterday and some leave the via’s open on purpose, so a bit of paste is already pushed into them during pasting and wicking is less.
You also have to consider the purpose of your GND pad. How much heat does it have to carry away? Is this the mayor reason, or is it more used for noise suppression, or even as an electrical connection? (The Raspberry Pico does not have any GND pins. the GND pad is the only GND connection on the chip. This breaks with “tradition” and I actually find it a quite clever solution).
That’s not very large yet, but maybe it’s good to avoid larger than, say, 2x2 or 3x3mm.
We once ordered a stencil for manual SMD assembly from one of the cheap Chinese manufacturers. They had changed some large holes without asking us first (unfortunately I don’t remember how large they were). I was angry for a short while, of course, but I can understand they know more about good stencils than I do.
When the paste is applied, you have to wipe along the surface of the stencil with some straight edged sharp object to wipe off the extra paste and leave the needed paste into the holes. If the wholes are large, the object may bend a bit into the holes and wipe off too much paste. And the paste may be a bit sticky so that the hole doesn’t keep it but the paste raises off with the wiping edge.
Usually there should be no need for exact shapes or large continuous areas because the purpose of the paste is to be melted so that it is spread around.
And BTW, remember to round the corners (in the rectangular holes). The paste tends to stick into sharp corners.
