Length matching single ended buses

Hi - I’m very new to KiCAD and am working on a bus that requires length matching of 50 ohm single ended traces. I have been looking around and not finding much information.

I watched this video: KiCAD now with differential pair routing and trace length matching | olimex but the length matching shown there was a bit basic - it required manually setting a target length and trying to tune to that. But that page is 10 years old.

How to Route Differential Pairs in KiCad | Sierra Circuits is also helpful - and shows how to make custom design rules for length matching diff pairs.

But that doesn’t really help me. Let’s take RGMII for example - I’d ideally want a panel that showed me the length of the 6 signals in one direction (so TXD0, TXD1, TXD2, TXD3, TXCLK, and TXCTL) and let me try to match to the longest of those. In my experience I route all the signals as best as I can, find which is longest, do my best to shorten it, and then lengthen the others to match that longest one. The example shown in the video linked above had every signal getting lengthened to a semi arbitrarily chosen length which does not seem like a good method.

So what is the latest and greatest method to do this in KiCAD 9? And can I set a design rule to compare a group of signals (like one direction of the RGMII interface, as mentioned above).

Thank you!!

I do not see the difference between the two methods you mention. But if you insist on shortening your longest track a bit, then you first set the "semi arbitrarily chosen length" to a little bit shorter as your longest track.

I did see a part of the video. The length matching part seems to be from 05:00 to 09:30 and the method has not changed much in KiCad in the last 10 years. Except maybe that now the meanders are placed in a “length tuning box” and you can change the size of that box later (or delete it). Maybe KiCad V9 has improved a bit further, but I’m still on V8.

With other ECAD packages this is how I would route RGMII:

  1. Connect all the traces in shortest paths possible
  2. In a side panel look at list of signal lengths for the 6 signals in one direction. Identify longest.
  3. Check if I can shorten the longest. Improve it as much as possible.
  4. Now add length to the other remaining 5 signals. I never tell ECAD tool my target here - I just adjust length and monitor it using side panel until all the other 5 signals are close enough to the longest signal.
  5. Also set design rule that will yell at me if they aren’t all within some tolerance of each other.

My concerns with KiCAD are:

  • A. It looks like there is no side panel to inspect a bus at once - that I need to inspect each trace and write down its length so that I can figure out what is longest. Is this right?
  • B. I don’t think there is any ability to include series resistors in these calculations. It is common to include a ~22 ohm series resistor on RGMII clock lines. Altium has XSignals to handle this situation. I think Cadence has XNets. I think KiCAD doesn’t have anything, right?
  • C. I don’t see any means of tracking length between just two pads when a signal makes multiple stops. Think DDR address lines with multiple chips on the same bus. Or just RGMII with a pull up on one pin. KiCAD seems to not be able to handle either situation as far as I can see. I tried just adding a small stub onto a length matched line and KiCAD started spitting out wildly wrong numbers for length (adding the stub made the signal shorter according to KiCAD).
  • D. It’s not clear if I can set a skew rule for single ended traces - all examples I see are just setting min and max length which is not useful IMHO. More useful is saying all nets within a class have to be within +/-5 mils of each other, for example.

I’m really hoping I’m missing something as these seem like very large limitations to me. Thank you!!

  1. A. You can use: PCB Editor / Inspect / Net Inspector, (For KiCad V8 and older only) then enter some common characters for your bus name in the filter.
  2. B. I am indeed not aware of the length tuner to work through series dampening resistors. The simplest workaround is probably to temporarily short circuit these resistors in the schematic. That would make the connection from IC pad to IC pad a single net.

For C & D. I have not used length tuning enough to give some decent advise here. KiCad has made a huge progress in the last 5 years, but it’s a mostly volunteer driven Open Source project, and developer resources are still limited (but growing). There are also 1500+ feature requests and bug reports on gitlab. Last time I checked there were around 300 issues closed / fixed each month, but also 300 new ones opened, and the number of 1500 open issues has been remarkably constant for several years now.

The current way to tune busses is as above (with a few things to make life easier).

  1. Route the traces, and identify the longest in the net inspector. You can configure groups of nets based on search patterns, so if they all start with a common prefix you can group the nets by that.
  2. Set a custom DRC rule for an optimum length for all the traces, set to the longest identified above.
  3. Use the single-ended length tuning tool on the other traces. It will pick up the target length from the DRC rule.

Skew tuning doesn’t currently work for busses (only differential pairs). It’s on my to-do list to implement.

  1. A. You can use: PCB Editor / Inspect / Net Inspector, then enter some common caracters for your bus name in the filter.

I don’t see that option. In the PCB editor if I go to the Inspect menu there is nothing called “net inspector” - how do I find that?

View → Panels → Net Inspector in modern KiCad

I’ve been struggling with this as well, so I used the KiCad IPC API to make a companion interface for length matching parallel busses: GitHub - cibomahto/length_match_hud: Length match HUD for KiCad

At the moment it shows the total length of single nets, and a comparison to the length of a reference net. With a bit more effort it would be possible to show combined lengths of nets split by a series resistor, or to switch to layer-based delay estimates rather than just copper length.

Presumably something like this will be built into KiCad proper eventually :slight_smile:

The net inspector lets you look at the length of groups of single nets (although it doesn’t show a comparisobn - but if you set up DRC rules as I described above, the tuning tools will work just fine).

Signals-like tuning (e.g. through a resistor) is something we’d like to implement in the future.

Time-domain tuning, including layer-specific trace delays, is implemented in the v9.99 nightly builds (which will become v10 when released).

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Awesome, looking forward to the improvements!

(using 9.0.4) If I make a custom length match rule, for example:

(version 1)

(rule "target length and skew"
	(condition "A.NetClass == 'SDRAM'")
	(constraint length (min 17mm) (opt 18.25mm) (max 19.5mm))
	(constraint skew (max 0.1mm))
)

the tuning pattern display will show it, but seems to under-estimate the track length if there are vias in the track. I assume this has probably been reworked in the nightly.

The net inspector is quite nice. I think it’s still helpful to have an indication to show which nets are not in compliance, to avoid having to manually look at each net. Looking forward to what’s coming in the next release.

Make sure you’ve selected the “Use stackup height in length calculations” (or something like that) option in the preferences. Check the docs for where this is - I’m not at my computer right now.

Other than that, there can be minor differences but these have (mostly) been fixed in the nightly: