KiCad for screen printed circuits review & DRC question

[MarkCatchpole]

Hi All,
I recently posted about using KiCad for screen printed circuits:
[KiCad for screen printed smart textile circuits?]
(KiCad for screen printed smart textile circuits?)
With lots of helpful advice from this forum and a spring in my step I got my hands dirty and created the world’s simplest circuit to answer the following questions : Can KiCad be used in the exciting world of printed circuits and will it be faster and easier for customers to design new circuits that meet our printing process design rules?:
trial4.zip (25.1 KB)
I believe the short answer is yes to both questions!:

1. Design paradigm and tool infrastructure of symbols, pads, schematics, routing components and DRC is also relevant to printed circuits: think libraries of electrodes for biometric sensing, printed pressure sensors, printed heaters etc and hybrid circuits which bring together the worlds of printed circuits and surface mounted components
2. Symbol, footprint, schematic & layout tools are very good
3. Easy to create libraries of printed components: good for design reuse
4. The routing tool can be configured to create wavy tracks using “Track corner mode”
5. Good documentation and video tutorials for rapid adoption
6. Excellent forum support
7. By choosing the right layers, the 3D tool can be configured to show the printed circuit with the layers in the right order: good for learning, explaining & promoting (see picture below).

My next steps will be to design and print a real circuit. If that works out OK my plan is to look for some funding to employ a software engineer to fully adapt the tools for printed circuits - perhaps create a printed circuit plugin? The outputs of that work would be fed back and hopefully adopted by the KiCad team.

In the meantime I have a question concerning custom DRC rules. Specifically I would like to be able to write a custom DRC rule that sets minimum overlaps on the wavy track in the example circuit. For example the adhesive arc should be wider than each encapsulation layer arcs by 1mm and the encapsulation layers should be wider than the silver track by 1mm. Can it be done? Any suggestions?

Kind regards
Mark

[JeffYoung]

I think the short answer is “no”. It’s easy enough to require traces on certain layers to be certain widths, but I imagine you also want to test that the layers line up (ie: that the encapsulation layer actually encapsulates the silver, not is just wider than it). Much of the DRC engine is pretty coupled with the idea of “collision”; and this really requires the opposite.

We have a feature on the 7.0 plan for pad-stacks (so that you can more exactly define things like mask, adhesive, etc.). This looks like it could use an equivalent “track-stack”.

[MarkCatchpole]

Hi Jeff,
Thanks for the explanation. The pad-stack feature would be very useful for printed circuits with full control over each layer’s properties and yes the option to configure a “track-stack” would be fantastic - define the encapsulating and adhesive overlaps and then you could route multiple layers at the same time.

You are correct the encapsulation “track” should not only be wider than the silver track but should overlap on both sides by a minimum amount. Having said this I would be interested in being able to check the width of the encapsulation “tracks” as an initial sanity check (I have used the Silkscreen layers for my encapsulation and adhesive layers). Is this possible?

[JeffYoung]

Move your encapsulation and adhesive layers to a copper layer and you’ll be able to make use of the router and better support for DRC rules.

(In the board setup dialog you specify the “usage” of copper layers. It’s currently limited to signal, power and mixed, but that might be another area that could be enhanced. Anyway, name one of them “encapsulation-1”.)

Then you’d write rules to the effect of:

(rule "silver"
   (layer silver)
   (constraint track_width (min 2mm)))

(rule "encapsulation"
   (layer encapsulation_1)
   (constraint track_width (min 4mm )))

If you needed to stay off copper layers for some reason then there are things in 7.0 that could address that:

(rule "encapsulation"
   (layer encapsulation_1)
   (constraint assertion "A.line_width > 4mm"))

But neither assertion nor the graphic item properties (line_width here) are in 6.0.

[retiredfeline]

My question is about your nomenclature. Are you really using a screen to print or it is all done with ink-jet printers now as I suspect? Because if so you could just drop screen from your term. For me it conjures up images of people placing a frame with a mesh over the substrate, and running a squeegee across it. I know, these anachronistic terms often persist, just as there is no silk at all involved in making PCB silkscreen.

You could also move from producer-centric naming to consumer-centric naming. Just like flavoured carbonated water ⇒ soft drink, you could call it electronic enhanced fabric or something like that. If you want exclusivity, call it Zapfab™ or some other term you dream up.

Oh, and please make a blinky T-shirt as a demo.

[eelik]

@retiredfeline

Oh, and please make a blinky T-shirt as a demo.

Blinking “Made with KiCad”`? Or “Never trust the autorouter”?

[retiredfeline]

@eelik

Made with KiCad

I once had a Made in Singapore T-shirt. Fortunately for my parents, I never wore it in their company.

[MarkCatchpole]

Hi, Thanks for your comments. The answer to your question is that we are using screen printing to manufacture circuits for a range of applications including www.myinnovo.com which treats urinary incontinence for which we have printed over 130,000 circuits over the last 3 years. The fundamentals of the technology haven’t changed since it was invented in China and are as you describe, but the materials and equipment have. We use synthetic mesh rather than silk and in our case print on sheets up to 100cm x 70cm on a production line with £2M of equipment.

I appreciate the logic about more consumer friendly language. We use the term “smart textiles” to describe the products that we enable to our customers and ultimately consumers. It may also be worth pointing out that printed electronics is a large and rapidly growing segment of the electronics market e.g.:

Finally this shows a hybrid circuit that we did with a partner for a hi viz jacket.

Kind regards
Mark

[MarkCatchpole]

Hi Jeff,
Many thanks for your thoughts on this - it hadn’t occurred to me to use multiple copper layers for the entire stack - this is a great workaround I think until 7.0 comes along - I will try it.
Kind regards
Mark

[retiredfeline]

Thanks! Looking forward to the IoW!

[MarkCatchpole]

IoW is a new one for me - I assume it isn’t Isle of White? Perhaps this could be the basis of a new wordle type game? Wordle - The New York Times (nytimes.com)