So you could easily swap gates or channels etc while laying out the PCB.
Gate swap is on the roadmap but didn’t make 6.0, it is currently planned for 7.0
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OK then! Why not just skip to 7.0? (I am kidding.)
But seriously…Am I correct in thinking that “swap-ability” would be a user-assignable attribute to sections of a multi-section logic gate or op amp IC?
With 5.1.x you can use Swap units action plugin. I plan to port it to V6, once the python API stabilizes.
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I have never seen much use for gate swapping and back-annotation.
Instead, I usually swap them in the schematic as needed, and then update the PCB.
This is the same amount of steps as swapping them on the PCB and then back-annotating them on the schematic. So why bother?
You can argue that switching back and through between Pcbnew and Eeschema makes the update in Eeschema a bit more cumbersome, and that is a valid argument. However: The extra overhead is very small. Most people these days have high resolution monitors, or dual monitor setups (If you don’t, then it’s highly recommended) and you can just use both Pcbnew and Eeschema next to each other. This is also handy because the cross-linked highlighting. You select a schematic symbol, and Pcbnew pans to where it’s footprint is and highlights it also (and the other way around).
Changing it in the schematic and then updating the PCB is also the normal workflow, you’ve probably done that hundredths of times, so you don’t have to learn anything new. And when you update the schematic first and then push the changes to Pcbnew, you also double check yourself and verify that both Eeschema and Pcbnew agree with each other and with your intentions. I prefer this very much above a “quick” swap in Pcbnew, and some back annotation without verification.
For me the amount of time that can possibly be saved by back annotation is so small that the whole subject is simply not interesting.
Perhaps I didn’t explain correctly / or my understanding of gate swapping is different than yours.
I work mostly on small boards where trace routing is critical. When working with a device with multiple identical functions ( I’m currently using an 74HC125), the way I initially create the schematic is seldom the optimum for the PCB. To have to change the schematic each time I want to see how the traces will flow requires I reroute 6 wires on the schematic, perhaps more. For me this is not a trivial effort, especially since one will likely have to move them around more that one time.
I don’t know what back annotation has to do with this ability, unless the symbol would change driven from the PCB final result. I would be happy even if the schematic broke but had a rats nest like PCB and I had to manually reroute the effected wires.
I don’t know how they actually worked but when we were using outside design services, the software they used had this feature.
I will try to claim the bottom of the heap here as “software idiot” but I think we understand your explanation. Basically we draw a schematic including a (more or less) arbitrary assignment of logic gates or op amps within a package (or maybe 2 or more packages.) When we route the pcb we figure out that we want to assign the “gates” differently. So we connect them in a way that works better on the pcb and want those changes to “back annotate” (be reflected back) to the schematic.
Paulvdh I have never had back annotation available to me as a tool, but I think it may be helpful if it works well. I think a lot depends upon your own mental process as you go through it. As things are now, I would need to try a change on the schematic and then see what happens on the pcb…maybe then try again. I think I would be more prone to make errors (they would probably be caught but would waste time) if I were to attempt to make connections on the pcb which were not driven by changes in the schematic.
Because the whole point is to see while doing the layout what’s the optimal route and pin. So, I should be able to route first and then simply “backannotate” what I did, instead of going back and forth between the layout and the schematic several times.
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OK, I give in.
If you’re routing some wires on the PCB and you see that U2A should be U3B, then swapping those on the PCB (and trigger back-annotation) is a bit quicker then going to the schematic, change U2A to U3B and change U3B to U2A and then doing the normal Eeschema / Tools / Update PCB from Schematic [F8].
But how important is a gate swapping feature these days?
In the '80-ies it was a time saving feature with hundredths of TTL chips on a single PCB, but PCB’s like that are not made anymore.
Pin swapping can be a nice feature, especially for big FPGA’s, but I think that a project like SKiDl is preferable above schematics for this. Schematics of a big FPGA is not much more then endless columns of stubby wires with labels. Back annotation would also be difficult to make, because you have to tell your FPGA tools what pins you had swapped, while the forwards path is always available, because that was used to put the netlist into KiCad in the first place.
So for what sort of designs is this swapping really useful?
(And by that I mean more then 20 or so swaps in a project. Below that number it’s just not worth worrying about).
I’m not asking anyone to “give in”. There are a lot of Kicad functions that some users like / need and others don’t. If gate swapping is no of interest to you … that’s fine I’m happy you have am approach / system that works for you.
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For what it’s worth, I would be unlikely to use it for eg 74xx logic (like you say I don’t do much of that), but my big usecases would be swapping opamp units and microcontroller IOs/peripherals, both of which are nice to optimize at layout-time rather than schematic entry time.
It’s a nice quality of life feature.
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