JLCPCB "Silkscreen overlap"

I’ve been using KiCAD for some time and wanted to improve my DFM skills.

JLCPCB has an online DFM checker, which I want to try to minimize warnings in as both practice and to practically improve my design for this fab. It has an error related to silkscreen being too close to pads.

I used KiCad DRC rules for JLCPCB, 2 & 4-layer PCB · GitHub as a source for figuring out some of the more subtle rules. In particular, setting silkscreen overlap to require a 0.18mm gap rather than 0mm.

After adding that I can get KiCAD DFC to show the same errors, which is great!

I generated gerbers manually with the “Subtract soldermask from silkscreen” box checked. However, this doesn’t cut off silkscreen at a distance from soldermask – i.e. I can’t really go through and edit every footprint’s silkscreen and hoped that at least the gerber generator would automatically cut them off.

I had hoped that manual gerber generation with the “Subtract soldermask from silkscreen” box checked would result in all visible silkscreen being cut off if it was violating the defined DRC rules by being too close to a pad, but I see that the soldermask is being used as a hard edge instead.

Does anyone know a way to make KiCAD trim soldermask in gerber files to a specified distance (0.18mm in the case of JLCPCB) so that it doesn’t generate any warnings with their DFM system?

I realize that they will just cut off the soldermask on their end, to an extent, but given the limitations of alignment I would very much like to avoid accidental silkscreen on my pads.

Thanks for any advice! The only other option I see, if I want to actually get this to work, is to manually edit every footprint and save them in a custom library.

Looks like an error in the footprint design. Why not update the footprint? I think that is a more solid solution. If you use this foot print in other designs you will end up with the same issue over and over again. So better solve it from the source.

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As far as I am aware your issue is the design rule that checks the silkscreen overlap doesn’t know about the “Subtract Soldermask” setting in the Gerber output. You need to manually check your Gerber output to validate if the silkscreen layer is clipped appropriately.

Might be a useful feature request for Kicad v10 so that a rule can be created that checks the state of the subtract solder mask setting.

You might have a look at the following issue. There is a way to create a rule to ignore the subtract setting:

Not sure if this will make it into v9 or if you will have to wait for v10.

Thank you both for the ideas!

@LilyTronics the reason I wanted to avoid updating the footprint is simply that I am using one from the built-in libraries which would delete my changes on version upgrades even if they were not read-only. I do have a custom footprint library, but I don’t really think it’s a sustainable solution to maintain a custom library of every standard package with silkscreen a little further from the pad.

@steves it’s actually a little stranger than that. JLCPCB has a specific requirement that soldermask be at least 0.18mm from the copper pad. I had to copy in custom rules to even accomplish that, I couldn’t find a standard setting.

(rule "Pad to Silkscreen"
	(constraint silk_clearance (min 0.18mm))
	(layer outer)
	(condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == 'graphic')"))

I could work around this by telling the fabrication file export to clip at soldermask while also telling board stackup to expand soldermask by 0.18mm.

However, I don’t actually want the soldermask to pad gap to be that big – the reason it is a rule is so that if the silkscreen is misaligned it doesn’t print on the pad. Their precision on the soldermask printing is far higher.

I will probably just ignore the issue unless there is a way to do it globally at file export time. As an example solution, instead of clipping the exported gerber file silkscreen to the soldermask, it can be configured to clip it to the soldermask + expansion distance. I don’t think that’s a feature, but if something like that exists it would be very nice.

Before I submitted my last order to JLCPCB a couple months ago I tried their DFM tool. It gave me one or two useful comments, along with a couple of really wacko warnings. It also warned that the tool was still early in development, and it shouldn’t be taken as definitive.

I submitted the board without any of the DFM tool’s suggested changes, and I received no complaints from their production staff on it.

Then the build in KiCad library footprints are wrong and should be updated :-). I never use the build in libraries, I always make my own just to prevent these kind of issues.

Wherever you found that number, it’s wrong. There’s no way any manufacture would use so large soldermask expansion (the space between a pad edge and the solder mask edge). JLCPCB seems to have 0.038 mm (PCB Manufacturing & Assembly Capabilities - JLCPCB). And you don’t need a custom rule for that: there certainly is a global value for that, in Board Setup → Solder Mask/Paste, and you can override it in each footprint and pad.