JLCPCB Kicad import of board setup?

I’m not sure if I can ask such question here.

I want to prevent vias, and to do that, I want to lower the trace clearances and track width. Now I found this nice board setup file where net classes design rules can be set.

I also found the capabilities of JLCPCB (probably the manufacturer for my first board).

However, I have some hard time/doubts what values of the JLCPCB capbilities belong to which parameter in Net Classes. Before I sum up all my doubts, I see there is an ‘Import Settings’ button. And I guess if there is somewhere a Board Setup file specifically for board manufacturers, so the minimum capabilities are met.

Kind regards.

Is there a particular reason to prevent the use of vias? I can understand this if you are making the board yourself when making a via is a bit of a faff, but you say you are planning on using JLCPCB. In the past, you got charged for vias but all the cheap Chinese fabs seem to charge simply by area and finish these days.

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Thanks for your reply … I read that the more vias, the more EMI protection is lost and more capacitance is added (although I don’t know for sure what implications that has). So I tried to prevent all vias except the ones from my SMD components to GND. And with some rerouting I can with a smaller track size lead three tracks instead of 1 or 2 , horizontally through a SOT23 and I can route 1 wire instead of none between a SOP component’s pins.

If you are asking that question, you probably don’t need to worry about vias for EMI/EMC.

Vias are very useful for tying ground planes properly, which will make so much more of a difference for improving EMC than avoiding a few vias for tracks. Failing that, be selective about which tracks you want to leave unbroken ie USB lines, XTAL tracks, high speed and power tracks etc.

Good to think about, but so many other issues to consider first.

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I’m afraid I don’t understand all implications. I have a two layer board, the back is fully GND, the front contains all tracks (mostly SMD components). With some rerouting I don’t have any broken lines (so I guess that is better).

I also wonder what other issues are to be considered first.

Sorry I learnt KiCad about a month ago, I made one board I will not produce (was more for learning), and redid the one I’m trying now for a few weeks (also just to try all different possibilities of KiCad). I will add a picture for clearity.

One tip is: don’t put vias in the middle of a solder pad, like you have for ground connections. The solder can get sucked through, and it can also cause tombstoning of parts. I believe it’s better to break out to a small track.

You can also increase track widths for a few of them.

You have done well to keep the ground plane as unbroken as possible, but you can also make use of the second layer for a few tracks if you want to clean things up. I personally would make use of the bottom layer a lot more, and then drop a ground pour over the first layer. This will also increase your ground connections if you are only keeping a two layer board.

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Thanks for all the tips… I had earlier GND via small tracks, but this looks nicer (at least here). I wanted to ask if that’s a good idea and now it seems not, so I will revert it back.

And indeed, I only have to make the tracks through the SOT23 and ICs and maybe some others small, the rest can be wider (or even the parts going through the SOT23 and ICs.

And yes, I will keep a two layer board … not sure how a ground pour over the first layer would look like. I read on various places it’s not good to ‘divide’ a GND plane with a long trace. Although some traces are messing up other tracks, for example the VCC tracks … you think it’s a good idea to move those to the GND plane?

And you mean with pouring ground on the first layer, to use all ‘unused’ space for GND ?

I say play with it a bit more, there are a number of parts where you are running tracks through components, when they could just be reorganised a little more and not have the tracks run through tiny gaps. You’ll notice that when you start packing your components much closer together, there will be less tracks running around the board and it will look cleaner.

You are correct that it is generally not desirable to have large cuts through a ground plane, but if there are two planes with solid connections between the two of them, it will probably not make a difference for your board. If you use a ground pour and more vias, then you will have a more solid ground return connection.

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Thanks for all tips … I will play with it more.

I don’t think I want to pack components closer together, because I need to solder them and I have very less experience soldering 0805 components, so to make it myself somewhat easier I rather like the components to be spread out a bit so my soldering iron can be placed in between the components.

I will move the VCC tracks to the GND plane (so my data lines will mostly go over the front), and than add GND areas to the front. Maybe I also can put some ‘difficult’ data lines on the back too. Thanks for all advice.

For soldering, I strongly recommend getting a stencil made by JLCPCB. They’re very cheap and make soldering boards MUCH easier. I was skeptical at first, but it is really worth it. Also, 0805 components are not that hard to solder by hand. I recently had someone quite new to soldering learn to hand solder 0603 components in just a few hours.

Nice work though! I hope the board works out. Looks like some sort of lighting controller… Burning Man?

P.S. You might also want to think about a 4 layer board in the future. They’re only a little more expensive, and having the inner ground and power planes makes routing much easier.

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The main benefit is that you get an uninterrupted ground plane which leads to much better EMC results without needing to think as hard as with a two layer board.

In a two layer board one really always needs to check that the ground plane is not interrupted below a fast (or critical) signal. (To avoid creating slot antennas. If it is interrupted where you cross then you need to give an alternative path for the “ground” on the top layer. Meaning stitching together bottom and top layer planes to get as close to a uninterrupted plane as possible.)


@Michel_Keijzers Regarding the board in general: Well i am not really convinced the part arrangement is the best possible. Especially around U2 and U5. Check for example the trace from R25 to U2. It goes around in circles. That can not be ideal. You have quite a few such traces. This shows that you tried to avoid vias at all cost which can be detrimental. D15 to R26 is another such trace.
I think you where trying too hard to have the parts on the pcb organized by function instead of organizing them such that it makes sense from a layout perspective. (Organizing by function is the job of the schematic not the layout.)

Just make sure that you keep your current return paths in mind. Remember: Every signal that crosses a gab in the gnd plane must get an alternative route for gnd. (assuming its return path is gnd)

So if you have a trace on the bottom layer then you introduce such an interruption. If you then have a trace crossing that interruption on the top layer then you need to offer also a return path for its signal. This is done by creating a gnd connection between these two interrupted gnd islands. (make a connection between the ground islands in parallel to the offending signal trace on the top layer. Either via a ground trace or via another zone on the top side.)

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Thank you for the compliment … I will check about the stencil (indeed, I’m a bit sceptical about it). I just tried one practice board with 1206, 0805 and 0603 components. The 1206 looked quite good, 0805 was reasonable, half of the 0603 were very messy and after watching some more youtube videos the second half was slightly better, but still not acceptable (at least by myself). So I decided to stick with 0805, at least for now.

It’s actually a kind of generic MIDI in/out/thru (for music synthesizers) and a DMX out (for lighting equipment). And some flash to store data. I want to make a program to control our light gear by use of MIDI commands. Since I have a few synthesizers, I am intending to add 3 of these on top of an Arduino Mega, and solder the correct 0R resistors to create the paths depending on which UART to use (and which LEDs).

I thought that a 4 layer board was really expensive compared to 2 layer, but in the future if I ever create more complicated boards it will be an option. I can see that the power planes mess up the ground plane.

Btw, I created already a different version with the power lines on the back (and some data lines). I have to get used to how it shows in KiCad, so far it looks messy. I will update it later today (have no access to my project right now).

Thanks for all your advice … you are right about grouping everything functionally. I think I can quite easily improve the U2/U5 ’ problems’ when I rotate them… I changed it, because I read on another website it is good practice to keep IC alignment equal (all pins in the same orientation). .But it makes my routing around them less clear (having the traces rotating around U2 and U5).

I’m not exactly sure yet what you mean with the GND / interrupting issue, but I will upload later today my circuit again which has a lot of ground ‘pours’ on the front and all VCC and a few data traces moved to the GND plane. I will upload when I have access to my project (being at work now).

You might want to double check the assumptions on that website (or any source for advice to be honest.)
There really is no reason to do it for reflow or hand soldering. For wave soldering you are restricted in the directions your devices can face. The fact that you will end up with devices oriented in the same manner might be a result of this restriction. (My guess is your source for advice has either no clue or you misunderstood them.)


Avoid situations like these (a trace in the middle of the ground plane will split it into two islands. If you have a trace on another layer crossing that split you can end up with a nice slot antenna):

Disclaimer: this picture was drawn to show the same problem but with a different route cause (split power planes, badly made star points) The result with a split because of a trace on that layer is similar enough for this to be a good enough picture.
https://kicad-info.s3-us-west-2.amazonaws.com/optimized/2X/1/10e0ba1fb343044991fbc537636b87afb47a2436_1_598x500.png

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Ah, electronics folklore and mythology #4. https://www.autodesk.com/products/eagle/blog/top-10-pcb-component-placement-tips-pcb-beginner/

There are certainly manufacturing considerations when placing components, but the reasoning in that article is pretty much nonsense. However, when one of the justifications is " Ugly Aesthetics. … It’s just plain lazy."
With bullshit reasoning like that, you can justify any old nonsense.

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I even never heard of wave soldering, so I guess the orientation is not an issue for me (except that it looks nice). I might have misunderstood it; I’m still quite a newbee, especially regarding soldering.

I now see clearly what is the problem, so thanks for the picture and description… At home I already added ground on the upper side, so that might help maybe. But for the rest I don’t see much options to solve this problem (if I have them at all, need to check that). I could throw in some via’s to interrupt a long trace line, or move the trace via a longer route away from the ground ’ island crossing’.

Thanks for the comment, I will read the article … I guess I also stepped in this ‘nonsense’ , but as a sort of newbee I hopefully can ‘afford it’. Good to learn better ways to keep in mind when designing a PCB.

Make sure you connect the two planes as much as possible. (By adding vias, which is kind of the opposite of your original idea of reducing the number of vias.)

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Yes, I will show the new design later (when I’m home) … I put on every command upper/low side ground every 100 mils a via (I think a few hundred in total)… It looks strange, and it seems not very maintainable when I have to change something, but it should do the job. Maybe I overdid it a bit :-).